RISC-V: Avoid coupling the T-Head CMOs and Zicbom
authorPalmer Dabbelt <palmer@rivosinc.com>
Thu, 15 Sep 2022 17:09:00 +0000 (10:09 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Sat, 17 Sep 2022 08:48:24 +0000 (01:48 -0700)
We could make the T-Head CMOs depend on a new-enough assembler to have
Zicbom, but it's not strictly necessary because the T-Head CMOs
circumvent the assembler.

Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220915170900.22685-1-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/cacheflush.h

index a89c005..273ece6 100644 (file)
@@ -42,8 +42,12 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
 
 #endif /* CONFIG_SMP */
 
-#ifdef CONFIG_RISCV_ISA_ZICBOM
+/*
+ * The T-Head CMO errata internally probe the CBOM block size, but otherwise
+ * don't depend on Zicbom.
+ */
 extern unsigned int riscv_cbom_block_size;
+#ifdef CONFIG_RISCV_ISA_ZICBOM
 void riscv_init_cbom_blocksize(void);
 #else
 static inline void riscv_init_cbom_blocksize(void) { }