#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-names = "clk_i2c";
+ clock-frequency = <100000>;
};
i2c1: i2c@1e000 {
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-names = "clk_i2c";
+ clock-frequency = <100000>;
};
i2c2: i2c@1d000 {
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-names = "clk_i2c";
+ clock-frequency = <100000>;
};
i2c3: i2c@1c000 {
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-names = "clk_i2c";
+ clock-frequency = <100000>;
};
pwm_ab: pwm@1b000 {
#size-cells = <0>;
clocks = <&clkc CLKID_I2C>;
clock-names = "clk_i2c";
+ clock-frequency = <100000>;
};
aoclkc: clock-controller@0 {
i2c1_dv_pins:i2c1_z {
mux {
groups = "i2c1_sda",
- "i2c2_sck";
+ "i2c1_sck";
function = "i2c1";
};
};
wdata1 |= *buf++ << ((i - 4) * 8);
writel(wdata0, i2c->regs + REG_TOK_WDATA0);
- writel(wdata0, i2c->regs + REG_TOK_WDATA1);
+ writel(wdata1, i2c->regs + REG_TOK_WDATA1);
dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
wdata0, wdata1, len);