drm/i915: Fix sprite offset on HSW

HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
register.

v2: Remove a useless level of indentation (Paulo Zanoni)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 393f22b..876af8e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3190,6 +3190,7 @@
 #define _SPRA_SURF             0x7029c
 #define _SPRA_KEYMAX           0x702a0
 #define _SPRA_TILEOFF          0x702a4
+#define _SPRA_OFFSET           0x702a4
 #define _SPRA_SCALE            0x70304
 #define   SPRITE_SCALE_ENABLE  (1<<31)
 #define   SPRITE_FILTER_MASK   (3<<29)
@@ -3210,6 +3211,7 @@
 #define _SPRB_SURF             0x7129c
 #define _SPRB_KEYMAX           0x712a0
 #define _SPRB_TILEOFF          0x712a4
+#define _SPRB_OFFSET           0x712a4
 #define _SPRB_SCALE            0x71304
 #define _SPRB_GAMC             0x71400
 
@@ -3223,6 +3225,7 @@
 #define SPRSURF(pipe) _PIPE(pipe, _SPRA_SURF, _SPRB_SURF)
 #define SPRKEYMAX(pipe) _PIPE(pipe, _SPRA_KEYMAX, _SPRB_KEYMAX)
 #define SPRTILEOFF(pipe) _PIPE(pipe, _SPRA_TILEOFF, _SPRB_TILEOFF)
+#define SPROFFSET(pipe) _PIPE(pipe, _SPRA_OFFSET, _SPRB_OFFSET)
 #define SPRSCALE(pipe) _PIPE(pipe, _SPRA_SCALE, _SPRB_SCALE)
 #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
 

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index f9001af..e36123d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -127,7 +127,12 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
 
        I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
        I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);
-       if (obj->tiling_mode != I915_TILING_NONE) {
+
+       if (IS_HASWELL(dev)) {
+               /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single
+                * SPROFFSET register */
+               I915_WRITE(SPROFFSET(pipe), (y << 16) | x);
+       } else if (obj->tiling_mode != I915_TILING_NONE) {
                I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x);
        } else {
                unsigned long offset;
@@ -135,6 +140,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
                offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
                I915_WRITE(SPRLINOFF(pipe), offset);
        }
+
        I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
        if (intel_plane->can_scale)
                I915_WRITE(SPRSCALE(pipe), sprscale);