So that no store instruction will be generated.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D118222
if (Op0->getOpcode() == RISCVISD::BuildPairF64)
return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1));
+ if (Op0->isUndef()) {
+ SDValue Lo = DAG.getUNDEF(MVT::i32);
+ SDValue Hi = DAG.getUNDEF(MVT::i32);
+ return DCI.CombineTo(N, Lo, Hi);
+ }
+
SDLoc DL(N);
// It's cheaper to materialise two 32-bit integers than to load a double
define double @func_return_double_undef() nounwind {
; RV32IFD-LABEL: func_return_double_undef:
; RV32IFD: # %bb.0:
-; RV32IFD-NEXT: addi sp, sp, -16
-; RV32IFD-NEXT: fsd ft0, 8(sp)
-; RV32IFD-NEXT: lw a0, 8(sp)
-; RV32IFD-NEXT: lw a1, 12(sp)
-; RV32IFD-NEXT: addi sp, sp, 16
; RV32IFD-NEXT: ret
ret double undef
}