mtd: spi-nor: Move SST bits out of core.c

Create a SPI NOR manufacturer driver for SST chips, and move the
SST definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index cb06ee5..ef7afc6 100644 (file)
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -12,4 +12,5 @@ spi-nor-objs                  += issi.o
 spi-nor-objs                   += macronix.o
 spi-nor-objs                   += micron-st.o
 spi-nor-objs                   += spansion.o
+spi-nor-objs                   += sst.o
 obj-$(CONFIG_MTD_SPI_NOR)      += spi-nor.o

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 1500951..c81eac6 100644 (file)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1995,25 +1995,6 @@ int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor)
  * old entries may be missing 4K flag.
  */
 static const struct flash_info spi_nor_ids[] = {
-       /* SST -- large erase sizes are "overlays", "sectors" are 4K */
-       { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-       { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-       { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
-       { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
-       { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
-       { "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
-       { "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
-       { "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
-       { "sst25wf020a", INFO(0x621612, 0, 64 * 1024,  4, SECT_4K) },
-       { "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
-       { "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-       { "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-       { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32, SECT_4K |
-                             SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32, SECT_4K |
-                             SPI_NOR_DUAL_READ) },
-       { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-
        /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
        { "w25x05", INFO(0xef3010, 0, 64 * 1024,  1,  SECT_4K) },
        { "w25x10", INFO(0xef3011, 0, 64 * 1024,  2,  SECT_4K) },
@@ -2114,6 +2095,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = {
        &spi_nor_micron,
        &spi_nor_st,
        &spi_nor_spansion,
+       &spi_nor_sst,
 };
 
 static const struct flash_info *
@@ -2214,92 +2196,6 @@ read_err:
        return ret;
 }
 
-static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
-               size_t *retlen, const u_char *buf)
-{
-       struct spi_nor *nor = mtd_to_spi_nor(mtd);
-       size_t actual = 0;
-       int ret;
-
-       dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
-
-       ret = spi_nor_lock_and_prep(nor);
-       if (ret)
-               return ret;
-
-       ret = spi_nor_write_enable(nor);
-       if (ret)
-               goto out;
-
-       nor->sst_write_second = false;
-
-       /* Start write from odd address. */
-       if (to % 2) {
-               nor->program_opcode = SPINOR_OP_BP;
-
-               /* write one byte. */
-               ret = spi_nor_write_data(nor, to, 1, buf);
-               if (ret < 0)
-                       goto out;
-               WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
-                       goto out;
-
-               to++;
-               actual++;
-       }
-
-       /* Write out most of the data here. */
-       for (; actual < len - 1; actual += 2) {
-               nor->program_opcode = SPINOR_OP_AAI_WP;
-
-               /* write two bytes. */
-               ret = spi_nor_write_data(nor, to, 2, buf + actual);
-               if (ret < 0)
-                       goto out;
-               WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
-                       goto out;
-               to += 2;
-               nor->sst_write_second = true;
-       }
-       nor->sst_write_second = false;
-
-       ret = spi_nor_write_disable(nor);
-       if (ret)
-               goto out;
-
-       ret = spi_nor_wait_till_ready(nor);
-       if (ret)
-               goto out;
-
-       /* Write out trailing byte if it exists. */
-       if (actual != len) {
-               ret = spi_nor_write_enable(nor);
-               if (ret)
-                       goto out;
-
-               nor->program_opcode = SPINOR_OP_BP;
-               ret = spi_nor_write_data(nor, to, 1, buf + actual);
-               if (ret < 0)
-                       goto out;
-               WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
-                       goto out;
-
-               actual += 1;
-
-               ret = spi_nor_write_disable(nor);
-       }
-out:
-       *retlen += actual;
-       spi_nor_unlock_and_unprep(nor);
-       return ret;
-}
-
 /*
  * Write an address range to the nor chip.  Data must be written in
  * FLASH_PAGESIZE chunks.  The address range may be any size provided
@@ -2893,11 +2789,6 @@ static int spi_nor_setup(struct spi_nor *nor,
        return nor->params.setup(nor, hwcaps);
 }
 
-static void sst_set_default_init(struct spi_nor *nor)
-{
-       nor->flags |= SNOR_F_HAS_LOCK;
-}
-
 static void winbond_set_default_init(struct spi_nor *nor)
 {
        nor->params.set_4byte_addr_mode = winbond_set_4byte_addr_mode;
@@ -2912,10 +2803,6 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
 {
        /* Init flash parameters based on MFR */
        switch (JEDEC_MFR(nor->info)) {
-       case SNOR_MFR_SST:
-               sst_set_default_init(nor);
-               break;
-
        case SNOR_MFR_WINBOND:
                winbond_set_default_init(nor);
                break;
@@ -3387,6 +3274,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
        if (info->flags & SPI_NOR_HAS_LOCK)
                nor->flags |= SNOR_F_HAS_LOCK;
 
+       mtd->_write = spi_nor_write;
+
        /* Init flash parameters based on flash_info struct and SFDP */
        spi_nor_init_params(nor);
 
@@ -3407,12 +3296,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
                mtd->_is_locked = spi_nor_is_locked;
        }
 
-       /* sst nor chips use AAI word program */
-       if (info->flags & SST_WRITE)
-               mtd->_write = sst_write;
-       else
-               mtd->_write = spi_nor_write;
-
        if (info->flags & USE_FSR)
                nor->flags |= SNOR_F_USE_FSR;
        if (info->flags & SPI_NOR_HAS_TB) {

diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 4700251..e49a220 100644 (file)
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -179,6 +179,7 @@ extern const struct spi_nor_manufacturer spi_nor_macronix;
 extern const struct spi_nor_manufacturer spi_nor_micron;
 extern const struct spi_nor_manufacturer spi_nor_st;
 extern const struct spi_nor_manufacturer spi_nor_spansion;
+extern const struct spi_nor_manufacturer spi_nor_sst;
 
 int spi_nor_write_enable(struct spi_nor *nor);
 int spi_nor_write_disable(struct spi_nor *nor);

diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c
new file mode 100644 (file)
index 0000000..e0af6d2
--- /dev/null
+++ b/drivers/mtd/spi-nor/sst.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ */
+
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static const struct flash_info sst_parts[] = {
+       /* SST -- large erase sizes are "overlays", "sectors" are 4K */
+       { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8,
+                             SECT_4K | SST_WRITE) },
+       { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16,
+                             SECT_4K | SST_WRITE) },
+       { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32,
+                             SECT_4K | SST_WRITE) },
+       { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64,
+                             SECT_4K | SST_WRITE) },
+       { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
+       { "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1,
+                             SECT_4K | SST_WRITE) },
+       { "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2,
+                             SECT_4K | SST_WRITE) },
+       { "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4,
+                             SECT_4K | SST_WRITE) },
+       { "sst25wf020a", INFO(0x621612, 0, 64 * 1024,  4, SECT_4K) },
+       { "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
+       { "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8,
+                             SECT_4K | SST_WRITE) },
+       { "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16,
+                             SECT_4K | SST_WRITE) },
+       { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32,
+                             SECT_4K | SPI_NOR_DUAL_READ |
+                             SPI_NOR_QUAD_READ) },
+       { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
+                             SECT_4K | SPI_NOR_DUAL_READ) },
+       { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
+                             SECT_4K | SPI_NOR_DUAL_READ |
+                             SPI_NOR_QUAD_READ) },
+};
+
+static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
+                    size_t *retlen, const u_char *buf)
+{
+       struct spi_nor *nor = mtd_to_spi_nor(mtd);
+       size_t actual = 0;
+       int ret;
+
+       dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
+
+       ret = spi_nor_lock_and_prep(nor);
+       if (ret)
+               return ret;
+
+       ret = spi_nor_write_enable(nor);
+       if (ret)
+               goto out;
+
+       nor->sst_write_second = false;
+
+       /* Start write from odd address. */
+       if (to % 2) {
+               nor->program_opcode = SPINOR_OP_BP;
+
+               /* write one byte. */
+               ret = spi_nor_write_data(nor, to, 1, buf);
+               if (ret < 0)
+                       goto out;
+               WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
+               ret = spi_nor_wait_till_ready(nor);
+               if (ret)
+                       goto out;
+
+               to++;
+               actual++;
+       }
+
+       /* Write out most of the data here. */
+       for (; actual < len - 1; actual += 2) {
+               nor->program_opcode = SPINOR_OP_AAI_WP;
+
+               /* write two bytes. */
+               ret = spi_nor_write_data(nor, to, 2, buf + actual);
+               if (ret < 0)
+                       goto out;
+               WARN(ret != 2, "While writing 2 bytes written %i bytes\n", ret);
+               ret = spi_nor_wait_till_ready(nor);
+               if (ret)
+                       goto out;
+               to += 2;
+               nor->sst_write_second = true;
+       }
+       nor->sst_write_second = false;
+
+       ret = spi_nor_write_disable(nor);
+       if (ret)
+               goto out;
+
+       ret = spi_nor_wait_till_ready(nor);
+       if (ret)
+               goto out;
+
+       /* Write out trailing byte if it exists. */
+       if (actual != len) {
+               ret = spi_nor_write_enable(nor);
+               if (ret)
+                       goto out;
+
+               nor->program_opcode = SPINOR_OP_BP;
+               ret = spi_nor_write_data(nor, to, 1, buf + actual);
+               if (ret < 0)
+                       goto out;
+               WARN(ret != 1, "While writing 1 byte written %i bytes\n", ret);
+               ret = spi_nor_wait_till_ready(nor);
+               if (ret)
+                       goto out;
+
+               actual += 1;
+
+               ret = spi_nor_write_disable(nor);
+       }
+out:
+       *retlen += actual;
+       spi_nor_unlock_and_unprep(nor);
+       return ret;
+}
+
+static void sst_default_init(struct spi_nor *nor)
+{
+       nor->flags |= SNOR_F_HAS_LOCK;
+}
+
+static void sst_post_sfdp_fixups(struct spi_nor *nor)
+{
+       if (nor->info->flags & SST_WRITE)
+               nor->mtd._write = sst_write;
+}
+
+static const struct spi_nor_fixups sst_fixups = {
+       .default_init = sst_default_init,
+       .post_sfdp = sst_post_sfdp_fixups,
+};
+
+const struct spi_nor_manufacturer spi_nor_sst = {
+       .name = "sst",
+       .parts = sst_parts,
+       .nparts = ARRAY_SIZE(sst_parts),
+       .fixups = &sst_fixups,
+};