ARM: dts: berlin: add BG2Q nodes for USB support

Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index a35deb3..35253c9 100644 (file)
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -114,6 +114,40 @@
                        #interrupt-cells = <3>;
                };
 
+               usb_phy2: phy@a2f400 {
+                       compatible = "marvell,berlin2-usb-phy";
+                       reg = <0xa2f400 0x128>;
+                       #phy-cells = <0>;
+                       resets = <&chip 0x104 14>;
+                       status = "disabled";
+               };
+
+               usb2: usb@a30000 {
+                       compatible = "chipidea,usb2";
+                       reg = <0xa30000 0x10000>;
+                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&chip CLKID_USB2>;
+                       phys = <&usb_phy2>;
+                       phy-names = "usb-phy";
+                       status = "disabled";
+               };
+
+               usb_phy0: phy@b74000 {
+                       compatible = "marvell,berlin2-usb-phy";
+                       reg = <0xb74000 0x128>;
+                       #phy-cells = <0>;
+                       resets = <&chip 0x104 12>;
+                       status = "disabled";
+               };
+
+               usb_phy1: phy@b78000 {
+                       compatible = "marvell,berlin2-usb-phy";
+                       reg = <0xb78000 0x128>;
+                       #phy-cells = <0>;
+                       resets = <&chip 0x104 13>;
+                       status = "disabled";
+               };
+
                eth0: ethernet@b90000 {
                        compatible = "marvell,pxa168-eth";
                        reg = <0xb90000 0x10000>;
@@ -404,6 +438,26 @@
                        };
                };
 
+               usb0: usb@ed0000 {
+                       compatible = "chipidea,usb2";
+                       reg = <0xed0000 0x10000>;
+                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&chip CLKID_USB0>;
+                       phys = <&usb_phy0>;
+                       phy-names = "usb-phy";
+                       status = "disabled";
+               };
+
+               usb1: usb@ee0000 {
+                       compatible = "chipidea,usb2";
+                       reg = <0xee0000 0x10000>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&chip CLKID_USB1>;
+                       phys = <&usb_phy1>;
+                       phy-names = "usb-phy";
+                       status = "disabled";
+               };
+
                apb@fc0000 {
                        compatible = "simple-bus";
                        #address-cells = <1>;