dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 16 Oct 2022 17:00:32 +0000 (13:00 -0400)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 17 Oct 2022 17:07:58 +0000 (13:07 -0400)
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.  This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml

index cdfcf29..0f796f1 100644 (file)
@@ -49,8 +49,10 @@ patternProperties:
     oneOf:
       - $ref: "#/$defs/qcom-sdx65-tlmm-state"
       - patternProperties:
-          ".*":
+          "-pins$":
             $ref: "#/$defs/qcom-sdx65-tlmm-state"
+        additionalProperties: false
+
 '$defs':
   qcom-sdx65-tlmm-state:
     type: object
@@ -175,13 +177,13 @@ examples:
         };
 
         uart-w-subnodes-state {
-            rx {
+            rx-pins {
                 pins = "gpio4";
                 function = "blsp_uart1";
                 bias-pull-up;
             };
 
-            tx {
+            tx-pins {
                 pins = "gpio5";
                 function = "blsp_uart1";
                 bias-disable;