assert(TargetRegisterInfo::isPhysicalRegister(RA.Reg) &&
TargetRegisterInfo::isPhysicalRegister(RB.Reg));
- unsigned A = RA.Sub != 0 ? TRI.getSubReg(RA.Reg, RA.Sub) : RA.Reg;
- unsigned B = RB.Sub != 0 ? TRI.getSubReg(RB.Reg, RB.Sub) : RB.Reg;
+ uint32_t A = RA.Sub != 0 ? TRI.getSubReg(RA.Reg, RA.Sub) : RA.Reg;
+ uint32_t B = RB.Sub != 0 ? TRI.getSubReg(RB.Reg, RB.Sub) : RB.Reg;
return TRI.isSubRegister(A, B);
}
}
// If any super-register of RR is present, then RR is covered.
- unsigned Reg = RR.Sub == 0 ? RR.Reg : TRI.getSubReg(RR.Reg, RR.Sub);
+ uint32_t Reg = RR.Sub == 0 ? RR.Reg : TRI.getSubReg(RR.Reg, RR.Sub);
for (MCSuperRegIterator SR(Reg, &TRI); SR.isValid(); ++SR)
if (RRs.count({*SR, 0}))
return true;
if (TargetRegisterInfo::isVirtualRegister(RR.Reg))
return AS;
assert(TargetRegisterInfo::isPhysicalRegister(RR.Reg));
- unsigned R = RR.Reg;
+ uint32_t R = RR.Reg;
if (RR.Sub)
R = TRI.getSubReg(RR.Reg, RR.Sub);
assert(PhysA && PhysB);
(void)PhysA, (void)PhysB;
- unsigned A = RA.Sub ? TRI.getSubReg(RA.Reg, RA.Sub) : RA.Reg;
- unsigned B = RB.Sub ? TRI.getSubReg(RB.Reg, RB.Sub) : RB.Reg;
+ uint32_t A = RA.Sub ? TRI.getSubReg(RA.Reg, RA.Sub) : RA.Reg;
+ uint32_t B = RB.Sub ? TRI.getSubReg(RB.Reg, RB.Sub) : RB.Reg;
for (MCRegAliasIterator I(A, &TRI, true); I.isValid(); ++I)
if (B == *I)
return true;
// uses or defs, and those lists do not allow sub-registers.
if (Op.getSubReg() != 0)
return false;
- unsigned Reg = Op.getReg();
+ uint32_t Reg = Op.getReg();
const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs()
: D.getImplicitUses();
if (!ImpR)