wifi: iwlwifi: Update support for b0 version
authorMukesh Sisodiya <mukesh.sisodiya@intel.com>
Tue, 18 Apr 2023 09:28:04 +0000 (12:28 +0300)
committerJohannes Berg <johannes.berg@intel.com>
Thu, 20 Apr 2023 09:45:54 +0000 (11:45 +0200)
Add support for B0 version of MAC of MR device

Signed-off-by: Mukesh Sisodiya <mukesh.sisodiya@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230418122405.5dca1ea7a0cf.I87932e1e216a1940eeae8824071ecb777f4c034f@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
drivers/net/wireless/intel/iwlwifi/cfg/22000.c
drivers/net/wireless/intel/iwlwifi/iwl-config.h
drivers/net/wireless/intel/iwlwifi/pcie/drv.c

index 532d14f..b6f8251 100644 (file)
 #define IWL_MA_A_GF4_A_FW_PRE          "iwlwifi-ma-a0-gf4-a0-"
 #define IWL_MA_A_MR_A_FW_PRE           "iwlwifi-ma-a0-mr-a0-"
 #define IWL_MA_A_FM_A_FW_PRE           "iwlwifi-ma-a0-fm-a0-"
+#define IWL_MA_B_HR_B_FW_PRE           "iwlwifi-ma-b0-hr-b0-"
+#define IWL_MA_B_GF_A_FW_PRE           "iwlwifi-ma-b0-gf-a0-"
+#define IWL_MA_B_GF4_A_FW_PRE          "iwlwifi-ma-b0-gf4-a0-"
+#define IWL_MA_B_MR_A_FW_PRE           "iwlwifi-ma-b0-mr-a0-"
+#define IWL_MA_B_FM_A_FW_PRE           "iwlwifi-ma-b0-fm-a0-"
 #define IWL_SNJ_A_MR_A_FW_PRE          "iwlwifi-SoSnj-a0-mr-a0-"
 #define IWL_BZ_A_HR_A_FW_PRE           "iwlwifi-bz-a0-hr-b0-"
 #define IWL_BZ_A_HR_B_FW_PRE           "iwlwifi-bz-a0-hr-b0-"
        IWL_MA_A_MR_A_FW_PRE __stringify(api) ".ucode"
 #define IWL_MA_A_FM_A_FW_MODULE_FIRMWARE(api)          \
        IWL_MA_A_FM_A_FW_PRE __stringify(api) ".ucode"
+#define IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(api)          \
+       IWL_MA_B_HR_B_FW_PRE __stringify(api) ".ucode"
+#define IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(api)          \
+       IWL_MA_B_GF_A_FW_PRE __stringify(api) ".ucode"
+#define IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(api)         \
+       IWL_MA_B_GF4_A_FW_PRE __stringify(api) ".ucode"
+#define IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(api) \
+       IWL_MA_B_MR_A_FW_PRE __stringify(api) ".ucode"
+#define IWL_MA_B_FM_A_FW_MODULE_FIRMWARE(api)          \
+       IWL_MA_B_FM_A_FW_PRE __stringify(api) ".ucode"
 #define IWL_SNJ_A_MR_A_MODULE_FIRMWARE(api) \
        IWL_SNJ_A_MR_A_FW_PRE __stringify(api) ".ucode"
 #define IWL_BZ_A_HR_A_MODULE_FIRMWARE(api) \
@@ -891,6 +906,41 @@ const struct iwl_cfg iwl_cfg_ma_a0_ms_a0 = {
        .num_rbds = IWL_NUM_RBDS_AX210_HE,
 };
 
+const struct iwl_cfg iwl_cfg_ma_b0_fm_a0 = {
+       .fw_name_pre = IWL_MA_B_FM_A_FW_PRE,
+       .uhb_supported = true,
+       IWL_DEVICE_AX210,
+       .num_rbds = IWL_NUM_RBDS_AX210_HE,
+};
+
+const struct iwl_cfg iwl_cfg_ma_b0_hr_b0 = {
+       .fw_name_pre = IWL_MA_B_HR_B_FW_PRE,
+       .uhb_supported = true,
+       IWL_DEVICE_AX210,
+       .num_rbds = IWL_NUM_RBDS_AX210_HE,
+};
+
+const struct iwl_cfg iwl_cfg_ma_b0_gf_a0 = {
+       .fw_name_pre = IWL_MA_B_GF_A_FW_PRE,
+       .uhb_supported = true,
+       IWL_DEVICE_AX210,
+       .num_rbds = IWL_NUM_RBDS_AX210_HE,
+};
+
+const struct iwl_cfg iwl_cfg_ma_b0_gf4_a0 = {
+       .fw_name_pre = IWL_MA_B_GF4_A_FW_PRE,
+       .uhb_supported = true,
+       IWL_DEVICE_AX210,
+       .num_rbds = IWL_NUM_RBDS_AX210_HE,
+};
+
+const struct iwl_cfg iwl_cfg_ma_b0_mr_a0 = {
+       .fw_name_pre = IWL_MA_B_MR_A_FW_PRE,
+       .uhb_supported = true,
+       IWL_DEVICE_AX210,
+       .num_rbds = IWL_NUM_RBDS_AX210_HE,
+};
+
 const struct iwl_cfg iwl_cfg_so_a0_ms_a0 = {
        .fw_name_pre = IWL_SO_A_MR_A_FW_PRE,
        .uhb_supported = false,
@@ -1149,6 +1199,11 @@ MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_MA_A_FM_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+MODULE_FIRMWARE(IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+MODULE_FIRMWARE(IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+MODULE_FIRMWARE(IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+MODULE_FIRMWARE(IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
+MODULE_FIRMWARE(IWL_MA_B_FM_A_FW_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_SNJ_A_MR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_BZ_A_HR_A_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
 MODULE_FIRMWARE(IWL_BZ_A_HR_B_MODULE_FIRMWARE(IWL_22000_UCODE_API_MAX));
index c4ac951..411b7d4 100644 (file)
@@ -640,6 +640,11 @@ extern const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0;
 extern const struct iwl_cfg iwl_cfg_ma_a0_mr_a0;
 extern const struct iwl_cfg iwl_cfg_ma_a0_ms_a0;
 extern const struct iwl_cfg iwl_cfg_ma_a0_fm_a0;
+extern const struct iwl_cfg iwl_cfg_ma_b0_hr_b0;
+extern const struct iwl_cfg iwl_cfg_ma_b0_gf_a0;
+extern const struct iwl_cfg iwl_cfg_ma_b0_gf4_a0;
+extern const struct iwl_cfg iwl_cfg_ma_b0_mr_a0;
+extern const struct iwl_cfg iwl_cfg_ma_b0_fm_a0;
 extern const struct iwl_cfg iwl_cfg_snj_a0_mr_a0;
 extern const struct iwl_cfg iwl_cfg_snj_a0_ms_a0;
 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
index 31b575f..dba1123 100644 (file)
@@ -1058,27 +1058,27 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
 
 /* Ma */
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
-                     IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_A_STEP,
                      IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
                      iwl_cfg_ma_a0_hr_b0, iwl_ax201_name),
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
-                     IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_A_STEP,
                      IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
                      iwl_cfg_ma_a0_gf_a0, iwl_ax211_name),
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
-                     IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_A_STEP,
                      IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
                      iwl_cfg_ma_a0_gf4_a0, iwl_ax211_name),
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
-                     IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_A_STEP,
                      IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
                      iwl_cfg_ma_a0_mr_a0, iwl_ax221_name),
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
-                     IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_A_STEP,
                      IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
                      iwl_cfg_ma_a0_fm_a0, iwl_ax231_name),
@@ -1087,6 +1087,31 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
                      IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY, IWL_CFG_ANY,
                      IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
                      iwl_cfg_snj_a0_mr_a0, iwl_ax221_name),
+       _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_B_STEP,
+                     IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
+                     iwl_cfg_ma_b0_hr_b0, iwl_ax201_name),
+       _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_B_STEP,
+                     IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
+                     iwl_cfg_ma_b0_gf_a0, iwl_ax211_name),
+       _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_B_STEP,
+                     IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_CDB, IWL_CFG_ANY,
+                     iwl_cfg_ma_b0_gf4_a0, iwl_ax211_name),
+       _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_B_STEP,
+                     IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
+                     iwl_cfg_ma_b0_mr_a0, iwl_ax221_name),
+       _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_MAC_TYPE_MA, SILICON_B_STEP,
+                     IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY,
+                     IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY,
+                     iwl_cfg_ma_b0_fm_a0, iwl_ax231_name),
 
 /* So with Hr */
        _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,