u8 regs[16];
};
-static int sandbox_p2sb_emul_read_config(struct udevice *emul, uint offset,
- ulong *valuep, enum pci_size_t size)
+static int sandbox_p2sb_emul_read_config(const struct udevice *emul,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
{
struct p2sb_emul_platdata *plat = dev_get_platdata(emul);
char mem_text[MEM_TEXT_SIZE];
};
-static int sandbox_swap_case_use_ea(struct udevice *dev)
+static int sandbox_swap_case_use_ea(const struct udevice *dev)
{
return !!ofnode_get_property(dev->node, "use-ea", NULL);
}
PCI_CAP_EA_SIZE_HI,
};
-static int sandbox_swap_case_read_ea(struct udevice *emul, uint offset,
+static int sandbox_swap_case_read_ea(const struct udevice *emul, uint offset,
ulong *valuep, enum pci_size_t size)
{
u32 reg;
return 0;
}
-static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,
- ulong *valuep, enum pci_size_t size)
+static int sandbox_swap_case_read_config(const struct udevice *emul,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
{
struct swap_case_platdata *plat = dev_get_platdata(emul);
*
* Return: 0 on success
*/
-static int pcie_advk_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
int dev_count;
};
-int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
+int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp)
{
struct pci_emul_uc_priv *upriv;
return 0;
}
-static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset)
+static u32 get_bus_address(const struct udevice *dev, pci_dev_t bdf, u32 offset)
{
struct rcar_gen2_pci_priv *priv = dev_get_priv(dev);
return get_bus_address(dev, bdf, offset);
}
-static int rcar_gen2_pci_read_config(struct udevice *dev, pci_dev_t bdf,
+static int rcar_gen2_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value,
enum pci_size_t size)
{
mask << shift, data << shift);
}
-static u32 rcar_read_conf(struct udevice *dev, int where)
+static u32 rcar_read_conf(const struct udevice *dev, int where)
{
struct rcar_gen3_pcie_priv *priv = dev_get_platdata(dev);
int shift = 8 * (where & 3);
return readl(priv->regs + (where & ~3)) >> shift;
}
-static int rcar_pcie_config_access(struct udevice *udev,
+static int rcar_pcie_config_access(const struct udevice *udev,
unsigned char access_type,
pci_dev_t bdf, int where, ulong *data)
{
return 0;
}
-static int rcar_gen3_pcie_read_config(struct udevice *dev, pci_dev_t bdf,
+static int rcar_gen3_pcie_read_config(const struct udevice *dev, pci_dev_t bdf,
uint where, ulong *val,
enum pci_size_t size)
{
}
};
-int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,
+int pci_bus_find_devfn(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **devp)
{
struct udevice *dev;
}
int pci_generic_mmap_write_config(
- struct udevice *bus,
- int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp),
+ const struct udevice *bus,
+ int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
+ void **addrp),
pci_dev_t bdf,
uint offset,
ulong value,
}
int pci_generic_mmap_read_config(
- struct udevice *bus,
- int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp),
+ const struct udevice *bus,
+ int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
+ void **addrp),
pci_dev_t bdf,
uint offset,
ulong *valuep,
return 0;
}
-static int pci_bridge_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pci_bridge_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
void __iomem *cfg_data;
};
-static int mpc85xx_pci_dm_read_config(struct udevice *dev, pci_dev_t bdf,
+static int mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value,
enum pci_size_t size)
{
return container_of(hose, struct mvebu_pcie, hose);
}
-static int mvebu_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+static int mvebu_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
return ops->write_config(emul, offset, value, size);
}
-static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn,
+static int sandbox_pci_read_config(const struct udevice *bus, pci_dev_t devfn,
uint offset, ulong *valuep,
enum pci_size_t size)
{
return 0;
}
-static u32 get_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset)
+static u32 get_bus_address(const struct udevice *dev, pci_dev_t bdf, u32 offset)
{
return BIT(31) | (PCI_DEV(bdf) << 8) | (offset & ~3);
}
-static int sh7751_pci_read_config(struct udevice *dev, pci_dev_t bdf,
+static int sh7751_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value,
enum pci_size_t size)
{
}
}
-static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pci_tegra_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
#include <pci.h>
#include <asm/pci.h>
-static int _pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong *valuep, enum pci_size_t size)
+static int _pci_x86_read_config(const struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
{
return pci_x86_read_config(bdf, offset, valuep, size);
}
*
* Return: 0 on success
*/
-static int pcie_dw_mvebu_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_dw_mvebu_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
*
* Return: 0 on success
*/
-static int pcie_dw_ti_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_dw_ti_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
* code. Otherwise the address to access will be written to the pointer pointed
* to by @paddress.
*/
-static int pci_generic_ecam_conf_address(struct udevice *bus, pci_dev_t bdf,
- uint offset, void **paddress)
+static int pci_generic_ecam_conf_address(const struct udevice *bus,
+ pci_dev_t bdf, uint offset,
+ void **paddress)
{
struct generic_ecam_pcie *pcie = dev_get_priv(bus);
void *addr;
* space of the device identified by the bus, device & function numbers in @bdf
* on the PCI bus @bus.
*/
-static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf,
- uint offset, ulong *valuep,
- enum pci_size_t size)
+static int pci_generic_ecam_read_config(const struct udevice *bus,
+ pci_dev_t bdf, uint offset,
+ ulong *valuep, enum pci_size_t size)
{
return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
bdf, offset, valuep, size);
return 0;
}
-static int fsl_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+static int fsl_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
imx_pcie_init();
}
#else
-static int imx_pcie_dm_read_config(struct udevice *dev, pci_dev_t bdf,
+static int imx_pcie_dm_read_config(const struct udevice *dev, pci_dev_t bdf,
uint offset, ulong *value,
enum pci_size_t size)
{
return tlp_read_packet(pcie, NULL);
}
-int intel_fpga_rp_conf_addr(struct udevice *bus, pci_dev_t bdf,
+int intel_fpga_rp_conf_addr(const struct udevice *bus, pci_dev_t bdf,
uint offset, void **paddress)
{
struct intel_fpga_pcie *pcie = dev_get_priv(bus);
byte_en, data);
}
-static int pcie_intel_fpga_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_intel_fpga_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
return 0;
}
-int ls_pcie_conf_address(struct udevice *bus, pci_dev_t bdf,
+int ls_pcie_conf_address(const struct udevice *bus, pci_dev_t bdf,
uint offset, void **paddress)
{
struct ls_pcie *pcie = dev_get_priv(bus);
return 0;
}
-static int ls_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+static int ls_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
return pcie->cfg + offset;
}
-static int ls_pcie_g4_read_config(struct udevice *bus, pci_dev_t bdf,
+static int ls_pcie_g4_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
struct list_head ports;
};
-static int mtk_pcie_config_address(struct udevice *udev, pci_dev_t bdf,
+static int mtk_pcie_config_address(const struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress)
{
struct mtk_pcie *pcie = dev_get_priv(udev);
return 0;
}
-static int mtk_pcie_read_config(struct udevice *bus, pci_dev_t bdf,
+static int mtk_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
* code. Otherwise the address to access will be written to the pointer pointed
* to by @paddress.
*/
-static int pci_phytium_conf_address(struct udevice *bus, pci_dev_t bdf,
- uint offset,
- void **paddress)
+static int pci_phytium_conf_address(const struct udevice *bus, pci_dev_t bdf,
+ uint offset, void **paddress)
{
struct phytium_pcie *pcie = dev_get_priv(bus);
void *addr;
* space of the device identified by the bus, device & function numbers in @bdf
* on the PCI bus @bus.
*/
-static int pci_phytium_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pci_phytium_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
*
* Return: 0 on success, else -ENODEV
*/
-static int pcie_xilinx_config_address(struct udevice *udev, pci_dev_t bdf,
+static int pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf,
uint offset, void **paddress)
{
struct xilinx_pcie *pcie = dev_get_priv(udev);
*
* Return: 0 on success, else -ENODEV or -EINVAL
*/
-static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf,
+static int pcie_xilinx_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
u8 regs[MEMMAP_SIZE];
};
-static int sandbox_pmc_emul_read_config(struct udevice *emul, uint offset,
+static int sandbox_pmc_emul_read_config(const struct udevice *emul, uint offset,
ulong *valuep, enum pci_size_t size)
{
struct pmc_emul_platdata *plat = dev_get_platdata(emul);
* @size: Access size
* @return 0 if OK, -ve on error
*/
- int (*read_config)(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong *valuep, enum pci_size_t size);
+ int (*read_config)(const struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong *valuep, enum pci_size_t size);
/**
* write_config() - Write a PCI configuration value
*
* @devp: Returns the device for this address, if found
* @return 0 if OK, -ENODEV if not found
*/
-int pci_bus_find_devfn(struct udevice *bus, pci_dev_t find_devfn,
+int pci_bus_find_devfn(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **devp);
/**
* Return: 0 on success, else -EINVAL
*/
int pci_generic_mmap_write_config(
- struct udevice *bus,
- int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp),
+ const struct udevice *bus,
+ int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
+ void **addrp),
pci_dev_t bdf,
uint offset,
ulong value,
* Return: 0 on success, else -EINVAL
*/
int pci_generic_mmap_read_config(
- struct udevice *bus,
- int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp),
+ const struct udevice *bus,
+ int (*addr_f)(const struct udevice *bus, pci_dev_t bdf, uint offset,
+ void **addrp),
pci_dev_t bdf,
uint offset,
ulong *valuep,
* @size: Access size
* @return 0 if OK, -ve on error
*/
- int (*read_config)(struct udevice *dev, uint offset, ulong *valuep,
- enum pci_size_t size);
+ int (*read_config)(const struct udevice *dev, uint offset,
+ ulong *valuep, enum pci_size_t size);
/**
* write_config() - Write a PCI configuration value
*
* @emulp: Returns emulated device if found
* @return 0 if found, -ENODEV if not found
*/
-int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
+int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn,
struct udevice **containerp, struct udevice **emulp);
/**
projects / platform / kernel / u-boot.git / commitdiff