staging: rtl8723bs: use MAX_RF_PATH_NUM as ceiling to rf path index

use MAX_RF_PATH_NUM as ceiling to rf path index.
Only 2 rf paths are used, not 4. Remove also
TX_POWER_BY_RATE_NUM_RF left unused.

Use RF_PATH_A as loop starting point instead of
hardcoded 0, as in other places.

Related comments modified accordingly.

Signed-off-by: Fabio Aiuto <fabioaiuto83@gmail.com>
Link: https://lore.kernel.org/r/88da23cef57131b39a63b2757b91f959553dd65d.1628329348.git.fabioaiuto83@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 272a9ec..14f34e3 100644 (file)
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -347,7 +347,7 @@ void PHY_InitTxPowerByRate(struct adapter *padapter)
        struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
        u8 rfPath, rate;
 
-       for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
+       for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath)
                for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
                        pHalData->TxPwrByRateOffset[rfPath][rate] = 0;
 }

diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index 7bbf81c..db9d758 100644 (file)
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -234,14 +234,12 @@ struct hal_com_data {
        u8 TxPwrInPercentage;
 
        u8 TxPwrCalibrateRate;
-       /*  TX power by rate table at most 4RF path. */
-       /*  The register is */
-       /*  VHT TX power by rate off setArray = */
-       /*  RF: at most 4*4 = ABCD = 0/1/2/3 */
-       /*  CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
+       /*  TX power by rate table */
+       /*  RF: at most 2 = AB = 0/1 */
+       /*  CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
        u8 TxPwrByRateTable;
        u8 TxPwrByRateBand;
-       s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_RF][TX_PWR_BY_RATE_NUM_RATE];
+       s8 TxPwrByRateOffset[MAX_RF_PATH_NUM][TX_PWR_BY_RATE_NUM_RATE];
        /*  */
 
        /* 2 Power Limit Table */
@@ -259,7 +257,7 @@ struct hal_com_data {
                                                [MAX_RF_PATH_NUM];
 
        /*  Store the original power by rate value of the base of each rate section of rf path A & B */
-       u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
+       u8 TxPwrByRateBase2_4G[MAX_RF_PATH_NUM][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
 
        /*  For power group */
        u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];

diff --git a/drivers/staging/rtl8723bs/include/hal_pg.h b/drivers/staging/rtl8723bs/include/hal_pg.h
index 2d8ccc9..7cb9c44 100644 (file)
--- a/drivers/staging/rtl8723bs/include/hal_pg.h
+++ b/drivers/staging/rtl8723bs/include/hal_pg.h
@@ -14,11 +14,9 @@
  */
 #define MAX_TX_COUNT                           4
 
-/*  For VHT series TX power by rate table. */
-/*  VHT TX power by rate off setArray = */
-/*  RF: at most 4*4 = ABCD = 0/1/2/3 */
-/*  CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
-#define TX_PWR_BY_RATE_NUM_RF                  4
+/*  TX power by rate table. */
+/*  RF: = AB = 0/1 */
+/*  CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
 #define TX_PWR_BY_RATE_NUM_RATE                        84
 #define MAX_RF_PATH_NUM                                2
 #define        MAX_CHNL_GROUP_24G                      6