re PR target/39715 ([cond-optab] extra sign extensions on Thumb)

2009-10-28  Paolo Bonzini  <bonzini@gnu.org>

	PR rtl-optimization/39715
	* config/arm/arm.md (cstoresi4): Use gen_cstoresi_ltu_thumb1.
	(gen_cstoresi_ltu_thumb1): New splitter.

2009-10-28  Paolo Bonzini  <bonzini@gnu.org>

	PR rtl-optimization/39715
	* gcc.target/arm/thumb-ltu.c: New.

From-SVN: r153678

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d2126f0..267f090 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-28  Paolo Bonzini  <bonzini@gnu.org>
+
+       PR rtl-optimization/39715
+       * config/arm/arm.md (cstoresi4): Use gen_cstoresi_ltu_thumb1.
+       (gen_cstoresi_ltu_thumb1): New splitter.
+
 2009-10-28  Richard Guenther  <rguenther@suse.de>
 
        PR lto/41808

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index fff41d8..d718c59 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8068,15 +8068,13 @@
       if (!thumb1_cmp_operand (op3, SImode))
         op3 = force_reg (SImode, op3);
       scratch = gen_reg_rtx (SImode);
-      emit_insn (gen_cstoresi_nltu_thumb1 (scratch, operands[2], op3));
-      emit_insn (gen_negsi2 (operands[0], scratch));
+      emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], operands[2], op3));
       break;
 
     case GTU:
       op3 = force_reg (SImode, operands[3]);
       scratch = gen_reg_rtx (SImode);
-      emit_insn (gen_cstoresi_nltu_thumb1 (scratch, op3, operands[2]));
-      emit_insn (gen_negsi2 (operands[0], scratch));
+      emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], op3, operands[2]));
       break;
 
     /* No good sequences for GT, LT.  */
@@ -8160,6 +8158,7 @@
   [(set_attr "length" "4")]
 )
 
+;; Used as part of the expansion of thumb ltu and gtu sequences
 (define_insn "cstoresi_nltu_thumb1"
   [(set (match_operand:SI 0 "s_register_operand" "=l,l")
         (neg:SI (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
@@ -8169,6 +8168,20 @@
   [(set_attr "length" "4")]
 )
 
+(define_insn_and_split "cstoresi_ltu_thumb1"
+  [(set (match_operand:SI 0 "s_register_operand" "=l,l")
+        (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h")
+               (match_operand:SI 2 "thumb1_cmp_operand" "lI*h,*r")))]
+  "TARGET_THUMB1"
+  "#"
+  "TARGET_THUMB1"
+  [(set (match_dup 3)
+       (neg:SI (ltu:SI (match_dup 1) (match_dup 2))))
+   (set (match_dup 0) (neg:SI (match_dup 3)))]
+  "operands[3] = gen_reg_rtx (SImode);"
+  [(set_attr "length" "4")]
+)
+
 ;; Used as part of the expansion of thumb les sequence.
 (define_insn "thumb1_addsi3_addgeu"
   [(set (match_operand:SI 0 "s_register_operand" "=l")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 751486d..129a05e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-28  Paolo Bonzini  <bonzini@gnu.org>
+
+       PR rtl-optimization/39715
+       * gcc.target/arm/thumb-ltu.c: New.
+
 2009-10-28  Richard Guenther  <rguenther@suse.de>
 
        PR lto/41808

diff --git a/gcc/testsuite/gcc.target/arm/thumb-ltu.c b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
new file mode 100644 (file)
index 0000000..899b8d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb-ltu.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */
+
+void f(unsigned a, unsigned b, unsigned c, unsigned d)
+{
+  if (a <= b || c > d)
+    foo();
+  else
+    bar();
+}
+
+/* { dg-final { scan-assembler-not "uxtb" } } */