media: uapi: HEVC: Change pic_order_cnt definition in v4l2_hevc_dpb_entry
authorBenjamin Gaignard <benjamin.gaignard@collabora.com>
Fri, 8 Jul 2022 16:21:45 +0000 (17:21 +0100)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Fri, 15 Jul 2022 15:26:08 +0000 (16:26 +0100)
The HEVC specification describes the following:
"PicOrderCntVal is derived as follows:
PicOrderCntVal = PicOrderCntMsb + slice_pic_order_cnt_lsb
The value of PicOrderCntVal shall be in the range of
−2^31 to 2^31 − 1, inclusive."

To match with these definitions change __u16 pic_order_cnt[2]
into __s32 pic_order_cnt_val.
Change v4l2_ctrl_hevc_slice_params->slice_pic_order_cnt to __s32 too.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Tested-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
drivers/staging/media/hantro/hantro_g2_hevc_dec.c
drivers/staging/media/hantro/hantro_hevc.c
drivers/staging/media/hantro/hantro_hw.h
drivers/staging/media/sunxi/cedrus/cedrus_h265.c
include/media/hevc-ctrls.h

index 868669a..3dfb81a 100644 (file)
@@ -3010,7 +3010,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
     * - __u8
       - ``colour_plane_id``
       -
-    * - __u16
+    * - __s32
       - ``slice_pic_order_cnt``
       -
     * - __u8
index 5df6f08..d28653d 100644 (file)
@@ -390,11 +390,10 @@ static int set_ref(struct hantro_ctx *ctx)
                         !!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED));
 
        /*
-        * Write POC count diff from current pic. For frame decoding only compute
-        * pic_order_cnt[0] and ignore pic_order_cnt[1] used in field-coding.
+        * Write POC count diff from current pic.
         */
        for (i = 0; i < decode_params->num_active_dpb_entries && i < ARRAY_SIZE(cur_poc); i++) {
-               char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt[0];
+               char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt_val;
 
                hantro_reg_write(vpu, &cur_poc[i], poc_diff);
        }
@@ -421,7 +420,7 @@ static int set_ref(struct hantro_ctx *ctx)
        dpb_longterm_e = 0;
        for (i = 0; i < decode_params->num_active_dpb_entries &&
             i < (V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1); i++) {
-               luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt[0]);
+               luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt_val);
                if (!luma_addr)
                        return -ENOMEM;
 
index 1df87ca..5984c5f 100644 (file)
@@ -33,7 +33,7 @@ void hantro_hevc_ref_init(struct hantro_ctx *ctx)
 }
 
 dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx,
-                                  int poc)
+                                  s32 poc)
 {
        struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec;
        int i;
index 24c1f18..762631d 100644 (file)
@@ -145,7 +145,7 @@ struct hantro_hevc_dec_hw_ctx {
        struct hantro_aux_buf tile_bsd;
        struct hantro_aux_buf ref_bufs[NUM_REF_PICTURES];
        struct hantro_aux_buf scaling_lists;
-       int ref_bufs_poc[NUM_REF_PICTURES];
+       s32 ref_bufs_poc[NUM_REF_PICTURES];
        u32 ref_bufs_used;
        struct hantro_hevc_dec_ctrls ctrls;
        unsigned int num_tile_cols_allocated;
@@ -358,7 +358,7 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx);
 int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx);
 int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx);
 void hantro_hevc_ref_init(struct hantro_ctx *ctx);
-dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc);
+dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, s32 poc);
 int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr);
 int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps);
 
index 44f385b..4116019 100644 (file)
@@ -143,8 +143,8 @@ static void cedrus_h265_frame_info_write_dpb(struct cedrus_ctx *ctx,
        for (i = 0; i < num_active_dpb_entries; i++) {
                int buffer_index = vb2_find_timestamp(vq, dpb[i].timestamp, 0);
                u32 pic_order_cnt[2] = {
-                       dpb[i].pic_order_cnt[0],
-                       dpb[i].pic_order_cnt[1]
+                       dpb[i].pic_order_cnt_val,
+                       dpb[i].pic_order_cnt_val
                };
 
                cedrus_h265_frame_info_write_single(ctx, i, dpb[i].field_pic,
index 45734bd..01c1795 100644 (file)
@@ -138,7 +138,7 @@ struct v4l2_hevc_dpb_entry {
        __u64   timestamp;
        __u8    flags;
        __u8    field_pic;
-       __u16   pic_order_cnt[2];
+       __s32   pic_order_cnt_val;
        __u8    padding[2];
 };
 
@@ -181,7 +181,7 @@ struct v4l2_ctrl_hevc_slice_params {
        /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
        __u8    slice_type;
        __u8    colour_plane_id;
-       __u16   slice_pic_order_cnt;
+       __s32   slice_pic_order_cnt;
        __u8    num_ref_idx_l0_active_minus1;
        __u8    num_ref_idx_l1_active_minus1;
        __u8    collocated_ref_idx;