--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/g12b_a311d_w400.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "partition_mbox_normal.dtsi"
+#include "mesong12b.dtsi"
+#include "mesong12b_skt-panel.dtsi"
+
+/ {
+ model = "Amlogic";
+ compatible = "amlogic, g12b";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c_AO;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x100000 0x7ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x0>;
+ pmsg-size = <0x8000>;
+ };
+
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x05300000 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7f800000 0x800000>;
+ };
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x8000000>;
+ alignment = <0x400000>;
+ };
+
+ //di_reserved:linux,di {
+ //compatible = "amlogic, di-mem";
+ /* buffer_size = 3621952(yuv422 8bit) */
+ /* 4179008(yuv422 10bit full pack mode) */
+ /** 10x3621952=34.6M(0x23) support 8bit **/
+ /** 10x4736064=45.2M(0x2e) support 12bit **/
+ /** 10x4179008=40M(0x28) support 10bit **/
+ //size = <0x2800000>;
+ //no-map;
+ //};
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+ /* vdin0 CMA pool */
+ vdin0_cma_reserved:linux,vdin0_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x04000000>;
+ alignment = <0x400000>;
+ };
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x04000000>;
+ alignment = <0x400000>;
+ };
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-g12b";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+ /* clk path */
+ /* 0:vid_pll vid2_clk */
+ /* 1:gp0_pll vid2_clk */
+ /* 2:vid_pll vid1_clk */
+ /* 3:gp0_pll vid1_clk */
+ clk_path = <0>;
+
+ /* performance: reg_address, reg_value */
+ /* g12b */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf850
+ 0xffff 0x0>; /* ending flag */
+ performance_sarft = <0x1bf0 0x9
+ 0x1b56 0x333
+ 0x1b12 0x0
+ 0x1b05 0x9
+ 0x1c59 0xfc48
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ gpio_hostwake = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
+ dhd_static_buf; //if use bcm wifi, config dhd_static_buf
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_e_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+ duty-cycle = <15020>;
+ times = <10>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <334 667>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ gpio_keypad {
+ compatible = "amlogic, gpio_keypad";
+ status = "okay";
+ scan_period = <20>;
+ key_num = <1>;
+ key_name = "power";
+ key_code = <116>;
+ key-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ detect_mode = <0>;/*0:polling mode, 1:irq mode*/
+ };
+
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "vol-", "vol+", "enter";
+ key_num = <3>;
+ io-channels = <&saradc SARADC_CH2>;
+ io-channel-names = "key-chan-2";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2>;
+ key_code = <114 115 28>;
+ key_val = <143 266 389>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40>;
+ };
+
+ unifykey{
+ compatible = "amlogic, unifykey";
+ status = "ok";
+ unifykey-num = <15>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11= <&keysn_11>;
+ unifykey-index-12= <&keysn_12>;
+ unifykey-index-13= <&keysn_13>;
+ unifykey-index-14= <&keysn_14>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "PlayReadykeybox25";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ };//End unifykey
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };//End efusekey
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_g12a";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <0>;/*1:enabel ;0:disable*/
+ };
+
+ /* Audio Related start */
+ pdm_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0x0 0xFF632000 0x0 0x2000>;
+ is_auge_used = <1>; /* meson or auge chipset used */
+ tdmout_index = <1>;
+ status = "okay";
+ };
+ audio_effect:eqdrc{
+ /*eq_enable = <1>;*/
+ /*drc_enable = <1>;*/
+ /*
+ * 0:tdmout_a
+ * 1:tdmout_b
+ * 2:tdmout_c
+ * 3:spdifout
+ * 4:spdifout_b
+ */
+ eqdrc_module = <1>;
+ /* max 0xf, each bit for one lane, usually one lane */
+ lane_mask = <0x1>;
+ /* max 0xff, each bit for one channel */
+ channel_mask = <0x3>;
+ };
+ auge_sound {
+ compatible = "amlogic, g12a-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ //aml-audio-card,loopback = <&aml_loopback>;
+ //aml-audio-card,aux-devs = <&amlogic_codec>;
+ /*avout mute gpio*/
+ avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ /*for audio effect ,eqdrc */
+ aml-audio-card,effect = <&audio_effect>;
+
+ aml-audio-card,dai-link@0 {
+ format = "dsp_a";
+ mclk-fs = <512>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ //bitclock-master = <&tdmacodec>;
+ //frame-master = <&tdmacodec>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-pcm";
+ tdmacpu: cpu {
+ sound-dai = <&aml_tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <24576000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmb>;
+ frame-master = <&aml_tdmb>;
+ //bitclock-master = <&tdmbcodec>;
+ //frame-master = <&tdmbcodec>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-i2s";
+ cpu {
+ sound-dai = <&aml_tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ tdmbcodec: codec {
+ sound-dai = <&dummy_codec &dummy_codec
+ &amlogic_codec &ad82584f_62>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmc>;
+ frame-master = <&aml_tdmc>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ //suffix-name = "alsaPORT-tdm";
+ cpu {
+ sound-dai = <&aml_tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-pdm";
+ cpu {
+ sound-dai = <&aml_pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ /* suffix-name, sync with android audio hal
+ * what's the dai link used for
+ */
+ suffix-name = "alsaPORT-spdif";
+ cpu {
+ sound-dai = <&aml_spdif>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ audiolocker: locker {
+ compatible = "amlogic, audiolocker";
+ clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
+ &clkaudio CLKID_AUDIO_LOCKER_IN
+ &clkaudio CLKID_AUDIO_MCLK_D
+ &clkaudio CLKID_AUDIO_MCLK_E
+ &clkc CLKID_MPLL1
+ &clkc CLKID_MPLL2>;
+ clock-names = "lock_out", "lock_in", "out_src",
+ "in_src", "out_calc", "in_ref";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq";
+ frequency = <49000000>; /* pll */
+ dividor = <49>; /* locker's parent */
+ status = "okay";
+ };
+ /* Audio Related end */
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <731000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <731000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <731000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <731000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <731000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <731000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1398000000>;
+ opp-microvolt = <761000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <791000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <831000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <861000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <981000>;
+ };
+ };
+
+ cpu_opp_table1: cpu_opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <751000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <751000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <751000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <751000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <771000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <771000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1398000000>;
+ opp-microvolt = <791000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <821000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <861000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <891000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ status = "okay";
+ };
+
+
+}; /* end of / */
+
+&meson_fb {
+ status = "okay";
+ display_size_default = <1920 1080 1920 2160 32>;
+ mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+ logo_addr = "0x7f800000";
+ mem_alloc = <0>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_ab {
+ status = "okay";
+ };
+
+&pwm_ef {
+ status = "okay";
+ };
+
+&pwm_AO_cd {
+ status = "okay";
+ };
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_master_pins2>;
+ clock-frequency = <400000>;
+
+ touchscreen@5d {
+ compatible = "goodix,gt9xx";
+ status = "disabled";
+ reg = <0x5d>;
+ reset-gpio = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH>;
+ irq-gpio = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ goodix,cfg-group0 = [
+ 41 00 04 58 02 05 0C 00 02 54 07
+ 0F 50 2D 03 05 00 00 00 00 40 00
+ 04 20 10 F3 AA 07 28 0A 2C 2E 7C
+ 06 00 00 00 C9 03 24 00 01 00 00
+ 00 00 FF 5D 66 98 32 28 64 94 C5
+ 02 08 00 00 01 91 2C 00 8A 34 00
+ 8A 3F 00 7E 4C 00 78 5B 00 78 00
+ 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 02 04 06 08 0A 0C 0E 10 12
+ 14 FF FF FF FF 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00
+ 02 04 06 08 0A 0C 1D 1E 1F 20 21
+ 22 24 26 FF FF FF FF FF FF FF FF
+ FF FF FF 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 E3 01];
+ };
+
+ touchscreen@38 {
+ compatible = "focaltech,fts";
+ status = "disabled";
+ reg = <0x38>;
+ reset-gpio = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH>;
+ irq-gpio = <&gpio GPIOZ_3 GPIO_ACTIVE_HIGH>;
+ x_max = <720>;
+ y_max = <1280>;
+ max-touch-number = <10>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c3_master_pins2>;
+ clock-frequency = <100000>; /* default 100k */
+
+ /* for ref board */
+ ad82584f_62: ad82584f_62@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio GPIOA_5 0>;
+ };
+
+ tlv320adc3101_32: tlv320adc3101_32@32 {
+ compatible = "ti,tlv320adc3101";
+ #sound-dai-cells = <0>;
+ reg = <0x19>;
+ differential_pair = <1>;
+ status = "disabled";
+ };
+
+ bl_extern_i2c {
+ compatible = "bl_extern, i2c";
+ dev_name = "lp8556";
+ reg = <0x2c>;
+ status = "disabled";
+ };
+};
+
+&audiobus {
+ aml_tdma: tdma {
+ compatible = "amlogic, g12a-snd-tdma";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1>;
+ dai-tdm-oe-lane-slot-mask-out = <1 0>;
+ dai-tdm-clk-sel = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_a &tdmin_a>;
+ };
+
+ aml_tdmb: tdmb {
+ compatible = "amlogic, g12a-snd-tdmb";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll", "samesource_sysclk";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;
+ /*
+ * 0: tdmout_a;
+ * 1: tdmout_b;
+ * 2: tdmout_c;
+ * 3: spdifout;
+ * 4: spdifout_b;
+ */
+ samesource_sel = <3>;
+ };
+
+ aml_tdmc: tdmc {
+ compatible = "amlogic, g12a-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+ #dai-tdm-lane-slot-mask-out = <1 0 1 1>;
+ #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>;
+ #dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>;
+ };
+
+ /* copy a useless tdm to output for hdmi, no pinmux */
+ aml_i2s2hdmi: i2s2hdmi {
+ compatible = "amlogic, g12a-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+
+ i2s2hdmi = <1>;
+
+ status = "okay";
+ };
+
+ aml_spdif: spdif {
+ compatible = "amlogic, g12a-snd-spdif-a";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT
+ &clkaudio CLKID_AUDIO_SPDIFIN_CTRL
+ &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "irq_spdifin";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout &spdifin>;
+ status = "okay";
+ };
+ aml_spdif_b: spdif_b {
+ compatible = "amlogic, g12a-snd-spdif-b";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_SPDIFOUTB
+ &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+ status = "disabled";
+ };
+ aml_pdm: pdm {
+ compatible = "amlogic, g12a-snd-pdm";
+ #sound-dai-cells = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+ filter_mode = <1>; /* mode 0~4, defalut:1 */
+ status = "okay";
+ };
+ aml_loopback: loopback {
+ compatible = "amlogic, snd-loopback";
+ /*
+ * 0: out rate = in data rate;
+ * 1: out rate = loopback data rate;
+ */
+ lb_mode = <0>;
+
+ /* datain src
+ * 0: tdmin_a;
+ * 1: tdmin_b;
+ * 2: tdmin_c;
+ * 3: spdifin;
+ * 4: pdmin;
+ */
+ datain_src = <4>;
+ datain_chnum = <8>;
+ datain_chmask = <0x3f>;
+
+ /* tdmin_lb src
+ * 0: tdmoutA
+ * 1: tdmoutB
+ * 2: tdmoutC
+ * 3: PAD_tdminA
+ * 4: PAD_tdminB
+ * 5: PAD_tdminC
+ */
+ datalb_src = <2>;
+ datalb_chnum = <8>;
+ datalb_chmask = <0x3>;
+
+ status = "disabled";
+ };
+
+ audioresample: resample {
+ compatible = "amlogic, g12a-resample";
+ clocks = <&clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_MCLK_F
+ &clkaudio CLKID_AUDIO_RESAMPLE_CTRL>;
+ clock-names = "resample_pll", "resample_src", "resample_clk";
+ /*same with toddr_src
+ * TDMIN_A, 0
+ * TDMIN_B, 1
+ * TDMIN_C, 2
+ * SPDIFIN, 3
+ * PDMIN, 4
+ * NONE,
+ * TDMIN_LB, 6
+ * LOOPBACK, 7
+ */
+ resample_module = <4>;
+ status = "disabled";
+ };
+ aml_pwrdet: pwrdet {
+ compatible = "amlogic, g12a-power-detect";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "pwrdet_irq";
+
+ /* pwrdet source sel
+ * 7: loopback;
+ * 6: tdmin_lb;
+ * 5: reserved;
+ * 4: pdmin;
+ * 3: spdifin;
+ * 2: tdmin_c;
+ * 1: tdmin_b;
+ * 0: tdmin_a;
+ */
+ pwrdet_src = <4>;
+
+ hi_th = <0x70000>;
+ lo_th = <0x16000>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ tdmout_a: tdmout_a {
+ mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
+ groups = "tdma_sclk",
+ "tdma_fs",
+ "tdma_dout0";
+ function = "tdma_out";
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOX_8 */
+ groups = "tdma_din1";
+ function = "tdma_in";
+ };
+ };
+
+ tdmb_mclk: tdmb_mclk {
+ mux {
+ groups = "mclk0_a";
+ function = "mclk0";
+ drive-strength = <2>;
+ };
+ };
+ tdmout_b: tdmout_b {
+ mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */
+ groups = "tdmb_sclk",
+ "tdmb_fs",
+ "tdmb_dout0";
+ function = "tdmb_out";
+ drive-strength = <2>;
+ };
+ };
+
+ tdmin_b:tdmin_b {
+ mux { /* GPIOA_4 */
+ groups = "tdmb_din1"
+ /*,"tdmb_slv_sclk", "tdmb_slv_fs"*/;
+ function = "tdmb_in";
+ drive-strength = <2>;
+ };
+ };
+
+ tdmc_mclk: tdmc_mclk {
+ mux { /* GPIOA_11 */
+ groups = "mclk1_a";
+ function = "mclk1";
+ };
+ };
+
+ tdmout_c:tdmout_c {
+ mux { /* GPIOA_12, GPIOA_13, GPIOA_8, GPIOA_7*/
+ groups = "tdmc_sclk_a",
+ "tdmc_fs_a",
+ "tdmc_dout0_a"
+ /*, "tdmc_dout2",
+ * "tdmc_dout3"
+ */;
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c:tdmin_c {
+ mux { /* GPIOA_10 */
+ groups = "tdmc_din0_a";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin: spdifin {
+ mux {/* GPIOH_5 */
+ groups = "spdif_in_h";
+ function = "spdif_in";
+ };
+ };
+
+ /* GPIOH_4 */
+ /*
+ * spdifout: spdifout {
+ * mux {
+ * groups = "spdif_out_h";
+ * function = "spdif_out";
+ * };
+ *};
+ */
+
+ pdmin: pdmin {
+ mux { /* gpioa_5, gpioa_6, gpioa_7, gpioa_8, gpioa_9*/
+ groups = "pdm_din0_a",
+ /*"pdm_din1_a",*/
+ "pdm_din2_a",
+ /*"pdm_din3_a",*/
+ "pdm_dclk_a";
+ function = "pdm";
+ };
+ };
+
+ bl_pwm_off_pins:bl_pwm_off_pin {
+ mux {
+ pins = "GPIOH_5";
+ function = "gpio_periphs";
+ output-high;
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&pinctrl_aobus {
+ spdifout: spdifout {
+ mux { /* gpiao_10 */
+ groups = "spdif_out_ao";
+ function = "spdif_out_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
+
+&irblaster {
+ status = "disabled";
+};
+
+&audio_data {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ /* "MMC_CAP_1_8V_DDR", */
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200";
+ /* "MMC_CAP2_HS400";*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&sd_emmc_b {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED";
+ f_min = <400000>;
+ f_max = <50000000>;
+ };
+};
+
+&sd_emmc_a {
+ status = "okay";
+ sdio {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&nand {
+ status = "disabled";
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+&dwc3 {
+ status = "okay";
+};
+
+&usb2_phy_v2 {
+ status = "okay";
+ portnum = <2>;
+};
+
+&usb3_phy_v2 {
+ status = "okay";
+ portnum = <0>;
+ otg = <1>;
+ gpio-vbus-power = "GPIOH_6";
+ gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
+};
+
+&dwc2_a {
+ status = "okay";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <3>;
+};
+ðmac {
+ status = "okay";
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&pcie_A {
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+};
+
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/mesong12a.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/amlogic,g12a-clkc.h>
+#include <dt-bindings/clock/amlogic,g12a-audio-clk.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/phy/phy-amlogic-pcie.h>
+#include "mesong12a-bifrost.dtsi"
+#include "g12b-sched-energy.dtsi"
+
+/ {
+ cpus:cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0:cluster0 {
+ core0 {
+ cpu = <&CPU0>;
+ };
+ core1 {
+ cpu = <&CPU1>;
+ };
+ };
+ cluster1:cluster1 {
+ core0 {
+ cpu = <&CPU2>;
+ };
+ core1 {
+ cpu = <&CPU3>;
+ };
+ core2 {
+ cpu = <&CPU4>;
+ };
+ core3 {
+ cpu = <&CPU5>;
+ };
+ };
+ };
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x0>;
+ enable-method = "psci";
+ //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS1_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x1>;
+ enable-method = "psci";
+ sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
+ clocks = <&clkc CLKID_CPU_CLK>,
+ <&clkc CLKID_CPU_FCLK_P>,
+ <&clkc CLKID_SYS1_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table0>;
+ cpu-supply = <&vddcpu0>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU2:cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73","arm,armv8";
+ reg = <0x100>;
+ enable-method = "psci";
+ //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+ clocks = <&clkc CLKID_CPUB_CLK>,
+ <&clkc CLKID_CPUB_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table1>;
+ cpu-supply = <&vddcpu1>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU3:cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73","arm,armv8";
+ reg = <0x101>;
+ enable-method = "psci";
+ //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+ clocks = <&clkc CLKID_CPUB_CLK>,
+ <&clkc CLKID_CPUB_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table1>;
+ cpu-supply = <&vddcpu1>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU4:cpu@102 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73","arm,armv8";
+ reg = <0x102>;
+ enable-method = "psci";
+ //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+ clocks = <&clkc CLKID_CPUB_CLK>,
+ <&clkc CLKID_CPUB_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table1>;
+ cpu-supply = <&vddcpu1>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ CPU5:cpu@103 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a73","arm,armv8";
+ reg = <0x103>;
+ enable-method = "psci";
+ //cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
+ sched-energy-costs = <&CPU_COST_A73 &CLUSTER_COST_A73>;
+ clocks = <&clkc CLKID_CPUB_CLK>,
+ <&clkc CLKID_CPUB_FCLK_P>,
+ <&clkc CLKID_SYS_PLL>;
+ clock-names = "core_clk",
+ "low_freq_clk_parent",
+ "high_freq_clk_parent";
+ operating-points-v2 = <&cpu_opp_table1>;
+ cpu-supply = <&vddcpu1>;
+ voltage-tolerance = <0>;
+ clock-latency = <50000>;
+ };
+
+ idle-states {
+ entry-method = "arm,psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x0010000>;
+ local-timer-stop;
+ entry-latency-us = <8000>;
+ exit-latency-us = <8000>;
+ min-residency-us = <20000>;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x1010000>;
+ local-timer-stop;
+ entry-latency-us = <9000>;
+ exit-latency-us = <9000>;
+ min-residency-us = <25000>;
+ };
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+
+ timer_bc {
+ compatible = "arm, meson-bc-timer";
+ reg= <0xffd0f190 0x4 0xffd0f194 0x4>;
+ timer_name = "Meson TimerF";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 60 1>;
+ bit_enable=<16>;
+ bit_mode=<12>;
+ bit_resolution=<0>;
+ };
+ arm_pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 137 4>;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0xffc01000 0x1000>,
+ <0xffc02000 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ status = "okay";
+ device_name = "aml_pm";
+ reg = <0xff8000a8 0x4>,
+ <0xff80023c 0x4>;
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ reserve_mem_size = <0x00300000>;
+ };
+
+ securitykey {
+ compatible = "aml, securitykey";
+ storage_query = <0x82000060>;
+ storage_read = <0x82000061>;
+ storage_write = <0x82000062>;
+ storage_tell = <0x82000063>;
+ storage_verify = <0x82000064>;
+ storage_status = <0x82000065>;
+ storage_list = <0x82000067>;
+ storage_remove = <0x82000068>;
+ storage_in_func = <0x82000023>;
+ storage_out_func = <0x82000024>;
+ storage_block_func = <0x82000025>;
+ storage_size_func = <0x82000027>;
+ storage_set_enctype = <0x8200006A>;
+ storage_get_enctype = <0x8200006B>;
+ storage_version = <0x8200006C>;
+ };
+
+ mailbox: mhu@c883c400 {
+ compatible = "amlogic, meson_mhu";
+ reg = <0xff63c400 0x4c>, /* MHU registers */
+ <0xfffe7000 0x800>; /* Payload area */
+ interrupts = <0 209 1>, /* low priority interrupt */
+ <0 210 1>; /* high priority interrupt */
+ #mbox-cells = <1>;
+ mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+ mboxes = <&mailbox 0 &mailbox 1>;
+ };
+
+ cpu_iomap {
+ compatible = "amlogic, iomap";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base {
+ reg = <0xffd00000 0x26000>;
+ };
+ io_apb_base {
+ reg = <0xffe01000 0x7f000>;
+ };
+ io_aobus_base {
+ reg = <0xff800000 0xb000>;
+ };
+ io_vapb_base {
+ reg = <0xff900000 0x50000>;
+ };
+ io_hiu_base {
+ reg = <0xff63c000 0x2000>;
+ };
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ status = "okay";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ aml_reboot{
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ vpu {
+ compatible = "amlogic, vpu-g12b";
+ dev_name = "vpu";
+ status = "okay";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_VPU_P0_COMP>,
+ <&clkc CLKID_VPU_P1_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ ethmac: ethernet@ff3f0000 {
+ compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+ reg = <0xff3f0000 0x10000
+ 0xff634540 0x8
+ 0xff64c000 0xa0>;
+ reg-names = "eth_base", "eth_cfg", "eth_pll";
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ status = "disabled";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
+ analog_val = <0x20200000 0x0000c000 0x00000023>;
+ };
+
+ pinctrl_aobus: pinctrl@ff800014{
+ compatible = "amlogic,meson-g12a-aobus-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio_ao: ao-bank@ff800014{
+ reg = <0xff800014 0x8>,
+ <0xff800024 0x14>,
+ <0xff80001c 0x8>;
+ reg-names = "mux","gpio", "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ pinctrl_periphs: pinctrl@ff634480{
+ compatible = "amlogic,meson-g12a-periphs-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio: banks@ff6346c0{
+ reg = <0xff6346c0 0x40>,
+ <0xff6344e8 0x18>,
+ <0xff634520 0x18>,
+ <0xff634440 0x4c>,
+ <0xff634740 0x1c>;
+ reg-names = "mux",
+ "pull",
+ "pull-enable",
+ "gpio",
+ "drive-strength";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "disabled";
+ reg = <0xff500000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ clocks = <&clkc CLKID_USB_GENERAL>;
+ clock-names = "dwc_general";
+ };
+
+ usb2_phy_v2: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2-v2";
+ status = "disabled";
+ reg = <0xffe09000 0x80
+ 0xffd01008 0x100
+ 0xff636000 0x2000
+ 0xff63a000 0x2000>;
+ pll-setting-1 = <0x09400414>;
+ pll-setting-2 = <0x927E0000>;
+ pll-setting-3 = <0xac5f69e5>;
+ pll-setting-4 = <0xfe18>;
+ pll-setting-5 = <0x8000fff>;
+ pll-setting-6 = <0x78000>;
+ pll-setting-7 = <0xe0004>;
+ pll-setting-8 = <0xe000c>;
+ };
+
+ usb3_phy_v2: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3-v2";
+ status = "disabled";
+ reg = <0xffe09080 0x20>;
+ phy-reg = <0xff646000>;
+ phy-reg-size = <0x2000>;
+ usb2-phy-reg = <0xffe09000>;
+ usb2-phy-reg-size = <0x80>;
+ interrupts = <0 16 4>;
+ clocks = <&clkc CLKID_PCIE_PLL>;
+ clock-names = "pcie_refpll";
+ };
+
+ dwc2_a: dwc2_a@ff400000 {
+ compatible = "amlogic, dwc2";
+ status = "disabled";
+ device_name = "dwc2_a";
+ reg = <0xff400000 0x40000>;
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "v2";
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ /** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
+ phy-interface = <0x0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ wdt: watchdog@0xffd0f0d0 {
+ compatible = "amlogic,meson-g12a-wdt";
+ status = "okay";
+ reg = <0xffd0f0d0 0x10>;
+ clock-names = "xtal";
+ clocks = <&xtal>;
+ };
+
+ saradc:saradc {
+ compatible = "amlogic,meson-g12a-saradc";
+ status = "disabled";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+ clock-names = "xtal", "saradc_clk";
+ interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
+ reg = <0xff809000 0x48>;
+ };
+
+ p_tsensor: p_tsensor@ff634594 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-pthermal";
+ status = "okay";
+ reg = <0xff634800 0x50>,
+ <0xff800268 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 35 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ d_tsensor: d_tsensor@ff800228 {
+ compatible = "amlogic, r1p1-tsensor";
+ device_name = "meson-dthermal";
+ status = "okay";
+ reg = <0xff634c00 0x50>,
+ <0xff800230 0x4>;
+ cal_type = <0x1>;
+ cal_a = <324>;
+ cal_b = <424>;
+ cal_c = <3159>;
+ cal_d = <9411>;
+ rtemp = <115000>;
+ interrupts = <0 36 0>;
+ clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
+ clock-names = "ts_comp";
+ #thermal-sensor-cells = <1>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cbus: cbus@ffd00000 {
+ compatible = "simple-bus";
+ reg = <0xffd00000 0x26000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xffd00000 0x26000>;
+
+ gpio_intc: interrupt-controller@f080 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,meson-g12a-gpio-intc";
+ reg = <0xf080 0x10>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <64 65 66 67 68 69 70 71>;
+ status = "okay";
+ };
+
+ meson_clk_msr {
+ compatible = "amlogic, gxl_measure";
+ reg = <0x18004 0x4
+ 0x1800c 0x4>;
+ };
+
+ pwm_ab: pwm@1b000 {
+ compatible = "amlogic,g12b-ee-pwm";
+ reg = <0x1b000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ /* default xtal 24m clkin0-clkin2 and
+ * clkin1-clkin3 should be set the same
+ */
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@1a000 {
+ compatible = "amlogic,g12b-ee-pwm";
+ reg = <0x1a000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@19000 {
+ compatible = "amlogic,g12b-ee-pwm";
+ reg = <0x19000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c0: i2c@1f000 {
+ compatible = "amlogic,meson-g12b-i2c";
+ status = "disabled";
+ reg = <0x1f000 0x20>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 91 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c1: i2c@1e000 {
+ compatible = "amlogic,meson-g12b-i2c";
+ status = "disabled";
+ reg = <0x1e000 0x20>;
+ interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c2: i2c@1d000 {
+ compatible = "amlogic,meson-g12b-i2c";
+ status = "disabled";
+ reg = <0x1d000 0x20>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 94 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c3: i2c@1c000 {
+ compatible = "amlogic,meson-g12b-i2c";
+ status = "disabled";
+ reg = <0x1c000 0x20>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 95 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ spicc0: spi@13000 {
+ compatible = "amlogic,meson-g12b-spicc",
+ "amlogic,meson-g12a-spicc";
+ reg = <0x13000 0x44>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC0>,
+ <&clkc CLKID_SPICC0_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@15000 {
+ compatible = "amlogic,meson-g12b-spicc",
+ "amlogic,meson-g12a-spicc";
+ reg = <0x15000 0x44>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC1>,
+ <&clkc CLKID_SPICC1_COMP>;
+ clock-names = "core", "comp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ }; /* end of cbus */
+
+ aobus: aobus@ff800000 {
+ compatible = "simple-bus";
+ reg = <0xff800000 0xb000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff800000 0xb000>;
+
+ cpu_version {
+ reg=<0x220 0x4>;
+ };
+
+ aoclkc: clock-controller@0 {
+ compatible = "amlogic,g12b-aoclkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x320>;
+ };
+
+ pwm_AO_ab: pwm@7000 {
+ compatible = "amlogic,g12b-ao-pwm";
+ reg = <0x7000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_AO_cd: pwm@2000 {
+ compatible = "amlogic,g12b-ao-pwm";
+ reg = <0x2000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ i2c_AO: i2c@5000 {
+ compatible = "amlogic,meson-g12b-i2c";
+ status = "disabled";
+ reg = <0x05000 0x20>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 201 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ i2c_AO_slave:i2c_slave@6000 {
+ compatible = "amlogic, meson-i2c-slave";
+ status = "disabled";
+ reg = <0x6000 0x20>;
+ interrupts = <0 194 1>;
+ pinctrl-names="default";
+ pinctrl-0=<&ao_i2c_slave_pins>;
+ };
+
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x3000 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&ao_uart_pins>;*/
+ support-sysrq = <0>; /* 0 not support*/
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x4000 0x18>;
+ interrupts = <0 197 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+ };/* end of aobus */
+
+ periphs: periphs@ff634400 {
+ compatible = "simple-bus";
+ reg = <0xff634400 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff634400 0x400>;
+
+ };/* end of periphs */
+
+ hiubus: hiubus@ff63c000 {
+ compatible = "simple-bus";
+ reg = <0xff63c000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff63c000 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,g12b-clkc-1";
+ #clock-cells = <1>;
+ reg = <0x0 0x3dc>;
+ };
+ clkc_b: clock-controller@1 {
+ compatible = "amlogic,g12b-clkc-2";
+ #clock-cells = <1>;
+ reg = <0x0 0x3dc>;
+ };
+ };/* end of hiubus*/
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_cma_reserved>;
+ };/* end of ion_dev*/
+
+ audiobus: audiobus@0xff642000 {
+ compatible = "amlogic, audio-controller", "simple-bus";
+ reg = <0xff642000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff642000 0x2000>;
+ clkaudio: audio_clocks {
+ compatible = "amlogic, g12a-audio-clocks";
+ #clock-cells = <1>;
+ reg = <0x0 0xb0>;
+ };
+ ddr_manager {
+ compatible = "amlogic, g12a-audio-ddr-manager";
+ interrupts = <
+ GIC_SPI 148 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 149 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 150 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 152 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 153 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 154 IRQ_TYPE_EDGE_RISING
+ >;
+ interrupt-names =
+ "toddr_a", "toddr_b", "toddr_c",
+ "frddr_a", "frddr_b", "frddr_c";
+ };
+ };/* end of audiobus*/
+
+ }; /* end of soc*/
+
+ remote:rc@0xff808040 {
+ compatible = "amlogic, aml_remote";
+ dev_name = "meson-remote";
+ reg = <0xff808040 0x44>, /*Multi-format IR controller*/
+ <0xff808000 0x20>; /*Legacy IR controller*/
+ status = "okay";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <0 196 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+ map = <&custom_maps>;
+ max_frame_time = <200>; /*set software decoder max frame time*/
+ };
+
+ custom_maps:custom_maps {
+ mapnum = <3>;
+ map0 = <&map_0>;
+ map1 = <&map_1>;
+ map2 = <&map_2>;
+ map_0: map_0{
+ mapname = "amlogic-remote-1";
+ customcode = <0xfb04>;
+ release_delay = <80>;
+ size = <50>; /*keymap size*/
+ keymap = <REMOTE_KEY(0x47, KEY_0)
+ REMOTE_KEY(0x13, KEY_1)
+ REMOTE_KEY(0x10, KEY_2)
+ REMOTE_KEY(0x11, KEY_3)
+ REMOTE_KEY(0x0F, KEY_4)
+ REMOTE_KEY(0x0C, KEY_5)
+ REMOTE_KEY(0x0D, KEY_6)
+ REMOTE_KEY(0x0B, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x5C, KEY_RIGHTCTRL)
+ REMOTE_KEY(0x51, KEY_F3)
+ REMOTE_KEY(0x50, KEY_F4)
+ REMOTE_KEY(0x40, KEY_F5)
+ REMOTE_KEY(0x4d, KEY_F6)
+ REMOTE_KEY(0x43, KEY_F7)
+ REMOTE_KEY(0x17, KEY_F8)
+ REMOTE_KEY(0x00, KEY_F9)
+ REMOTE_KEY(0x01, KEY_F10)
+ REMOTE_KEY(0x16, KEY_F11)
+ REMOTE_KEY(0x49, KEY_BACKSPACE)
+ REMOTE_KEY(0x06, KEY_PROPS)
+ REMOTE_KEY(0x14, KEY_UNDO)
+ REMOTE_KEY(0x44, KEY_UP)
+ REMOTE_KEY(0x1D, KEY_DOWN)
+ REMOTE_KEY(0x1C, KEY_LEFT)
+ REMOTE_KEY(0x48, KEY_RIGHT)
+ REMOTE_KEY(0x53, KEY_LEFTMETA)
+ REMOTE_KEY(0x45, KEY_PAGEUP)
+ REMOTE_KEY(0x19, KEY_PAGEDOWN)
+ REMOTE_KEY(0x52, KEY_PAUSE)
+ REMOTE_KEY(0x05, KEY_HANGEUL)
+ REMOTE_KEY(0x59, KEY_HANJA)
+ REMOTE_KEY(0x1b, KEY_SCALE)
+ REMOTE_KEY(0x04, KEY_KPCOMMA)
+ REMOTE_KEY(0x1A, KEY_POWER)
+ REMOTE_KEY(0x0A, KEY_TAB)
+ REMOTE_KEY(0x0e, KEY_MUTE)
+ REMOTE_KEY(0x1F, KEY_HOME)
+ REMOTE_KEY(0x1e, KEY_FRONT)
+ REMOTE_KEY(0x07, KEY_COPY)
+ REMOTE_KEY(0x12, KEY_OPEN)
+ REMOTE_KEY(0x54, KEY_PASTE)
+ REMOTE_KEY(0x02, KEY_FIND)
+ REMOTE_KEY(0x4f, KEY_A)
+ REMOTE_KEY(0x42, KEY_B)
+ REMOTE_KEY(0x5d, KEY_C)
+ REMOTE_KEY(0x4c, KEY_D)
+ REMOTE_KEY(0x58, KEY_CUT)
+ REMOTE_KEY(0x55, KEY_CALC)>;
+ };
+ map_1: map_1{
+ mapname = "amlogic-remote-2";
+ customcode = <0xfe01>;
+ release_delay = <80>;
+ size = <53>;
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)>;
+ };
+ map_2: map_2{
+ mapname = "amlogic-remote-3";
+ customcode = <0xbd02>;
+ release_delay = <80>;
+ size = <17>;
+ keymap = <REMOTE_KEY(0xca,103)
+ REMOTE_KEY(0xd2,108)
+ REMOTE_KEY(0x99,105)
+ REMOTE_KEY(0xc1,106)
+ REMOTE_KEY(0xce,97)
+ REMOTE_KEY(0x45,116)
+ REMOTE_KEY(0xc5,133)
+ REMOTE_KEY(0x80,113)
+ REMOTE_KEY(0xd0,15)
+ REMOTE_KEY(0xd6,125)
+ REMOTE_KEY(0x95,102)
+ REMOTE_KEY(0xdd,104)
+ REMOTE_KEY(0x8c,109)
+ REMOTE_KEY(0x89,131)
+ REMOTE_KEY(0x9c,130)
+ REMOTE_KEY(0x9a,120)
+ REMOTE_KEY(0xcd,121)>;
+ };
+ };
+
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd24000 0x18>;
+ interrupts = <0 26 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd23000 0x18>;
+ interrupts = <0 75 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xffd22000 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+
+ pcie_A: pcieA@fc000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0xfc000000 0x400000
+ 0xff648000 0x2000
+ 0xfc400000 0x200000
+ 0xff646000 0x2000
+ 0xffd01080 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ interrupts = <0 221 0>;
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0xfc600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0 0xfc700000 0xfc700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ num-lanes = <1>;
+ pcie-num = <1>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PHY>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <15>;
+ pcie-phy-rst-bit = <14>;
+ pcie-ctrl-a-rst-bit = <12>;
+ status = "disabled";
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_VAPB_MUX
+ &clkc CLKID_VPU_MUX>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ * 10:G12A 11:G12B
+ */
+ ic_type = <11>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+ };
+
+ galcore {
+ compatible = "amlogic, galcore";
+ dev_name = "galcore";
+ status = "disabled";
+ clocks = <&clkc CLKID_VNANOQ_AXI_CLK_COMP>,
+ <&clkc CLKID_VNANOQ_CORE_CLK_COMP>;
+ clock-names = "cts_vipnanoq_axi_clk_composite",
+ "cts_vipnanoq_core_clk_composite";
+ interrupts = <0 147 1>;
+ interrupt-names = "galcore";
+ reg = <0xff100000 0x800
+ 0xff000000 0x400000>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-g12a";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "G12B"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ port_num = <1>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1
+ 0 199 1>; /*0:snps 1:ts*/
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&eecec_a>;
+ pinctrl-1=<&eecec_b>;
+ pinctrl-2=<&eecec_b>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400
+ 0xFF634400 0x26>;
+ reg-names = "ao_exit","ao","periphs";
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin0";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ };
+ vdin1: vdin1 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin1";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "okay";
+ clocks = <&clkc CLKID_VPU_CLKC_P0_COMP>,
+ <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc0",
+ "vpu_clkc";
+ };
+
+ vdac {
+ compatible = "amlogic, vdac-g12b";
+ status = "okay";
+ };
+
+ canvas: canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xff638000 0x2000>;
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-g12a";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 146 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff940000 0x10000>;
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xffd00000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xff620000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xff63c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xff800000 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0xff900000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xff638000 0x2000>;
+ };
+ io_efuse_base{
+ reg = <0xff630000 0x2000>;
+ };
+ };
+
+ gdc:gdc {
+ #address-cells=<1>;
+ #size-cells=<1>;
+ status = "ok";
+ compatible = "amlogic, g12b-gdc";
+ reg = <0xFF950000 0x0000100
+ 0xFF63C16C 0x0000004
+ 0xFF63C100 0x0000004>;
+ interrupts = <0 144 1>;
+ interrupt-names = "GDC";
+ clocks = <&clkc CLKID_GDC_CORE_CLK_COMP
+ &clkc CLKID_GDC_AXI_CLK_COMP >;
+ clock-names = "core","axi";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX
+ &clkc CLKID_HEVCF_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "ahbarb0",
+ "vdec",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux",
+ "clk_hevcb_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ //memory-region = <&hevc_enc_reserved>;
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_reg_base{
+ reg = <0xff610000 0x4000>;
+ };
+ };
+
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ meson_fb: meson-fb {
+ compatible = "amlogic, meson-g12b";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "disable";
+ interrupts = <0 3 1
+ 0 56 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 2160 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ clocks = <&clkc CLKID_VPU_CLKC_MUX>;
+ clock-names = "vpu_clkc";
+ };
+ irblaster: meson-irblaster {
+ compatible = "amlogic, meson_irblaster";
+ reg = <0xff80014c 0x10>,
+ <0xff800040 0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ interrupts = <0 198 1>;
+ status = "disabled";
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12b";
+ reg = <0xffe07000 0x800>;
+ interrupts = <0 191 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ /* mmc-ddr-1_8v; */
+ /* mmc-hs200-1_8v; */
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /*caps defined in dts*/
+ tx_delay = <0>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b:sd@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12b";
+ reg = <0xffe05000 0x800>;
+ interrupts = <0 190 1>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "sd_to_ao_jtag_pins",
+ "ao_to_sd_jtag_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-8 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@ffe03000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12b";
+ reg = <0xffe03000 0x800>;
+ interrupts = <0 189 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+ nand: nfc@0 {
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0xFFE07800 0x200>;
+ interrupts = <0 34 1>;
+
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+ clock-names = "core", "clkin";
+
+ device_id = <0>;
+ /*fip/tpl configurations, must be same
+ * with uboot if bl_mode was set as 1
+ * bl_mode: 0 compact mode; 1 descrete mode
+ * if bl_mode was set as 1, fip configuration will work
+ */
+ bl_mode = <1>;
+ /*copy count of fip*/
+ fip_copies = <4>;
+ /*size of each fip copy */
+ fip_size = <0x200000>;
+ nand_clk_ctrl = <0xFFE07000>;
+ /*partions defined in dts */
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ device_name = "mcooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <120>;
+ cluster_id = <0>;
+ gpu_pp = <2>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpufreq_cool_cluster1 {
+ min_state = <1000000>;
+ dyn_coeff = <460>;
+ cluster_id = <1>;
+ gpu_pp = <2>;
+ node_name = "cpufreq_cool1";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ gpu_pp = <2>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ cpucore_cool_cluster1 {
+ min_state = <0>;
+ dyn_coeff = <0>;
+ cluster_id = <1>;
+ gpu_pp = <2>;
+ node_name = "cpucore_cool1";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <358>;
+ cluster_id = <0>;
+ gpu_pp = <2>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ gpu_pp = <2>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpufreq_cool1:cpufreq_cool1 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool1:cpucore_cool1 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ /*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <3550>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map0 {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 10>;
+ contribution = <1024>;
+ };
+ cpufreq_cooling_map1 {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool1 0 9>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map0 {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 1>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map1 {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool1 0 4>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&gpucore_cool0 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <3550>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ };
+ };
+ /*thermal zone end*/
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ pdm_bus {
+ reg = <0xFF640000 0x2000>;
+ };
+ audiobus_base {
+ reg = <0xFF642000 0x2000>;
+ };
+ audiolocker_base {
+ reg = <0xFF64A000 0x2000>;
+ };
+ eqdrc_base {
+ reg = <0xFF656000 0x1800>;
+ };
+ reset_base {
+ reg = <0xFFD01000 0x1000>;
+ };
+ };
+
+ vddcpu0: pwmao_d-regulator {
+ compatible = "pwm-regulator";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+ regulator-always-on;
+ max-duty-cycle = <1250>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1022000 0>,
+ <1011000 3>,
+ <1001000 6>,
+ <991000 10>,
+ <981000 13>,
+ <971000 16>,
+ <961000 20>,
+ <951000 23>,
+ <941000 26>,
+ <931000 30>,
+ <921000 33>,
+ <911000 36>,
+ <901000 40>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 76>,
+ <781000 80>,
+ <771000 83>,
+ <761000 86>,
+ <751000 90>,
+ <741000 93>,
+ <731000 96>,
+ <721000 100>;
+ status = "okay";
+ };
+
+ vddcpu1: pwmab_a-regulator {
+ compatible = "pwm-regulator";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_a_e2>;
+ pwms = <&pwm_ab MESON_PWM_0 1250 0>;
+ regulator-name = "vddcpu1";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+ regulator-always-on;
+ max-duty-cycle = <1250>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1022000 0>,
+ <1011000 3>,
+ <1001000 6>,
+ <991000 10>,
+ <981000 13>,
+ <971000 16>,
+ <961000 20>,
+ <951000 23>,
+ <941000 26>,
+ <931000 30>,
+ <921000 33>,
+ <911000 36>,
+ <901000 40>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 76>,
+ <781000 80>,
+ <771000 83>,
+ <761000 86>,
+ <751000 90>,
+ <741000 93>,
+ <731000 96>,
+ <721000 100>;
+ status = "okay";
+ };
+
+ ddr_bandwidth {
+ compatible = "amlogic, ddr-bandwidth";
+ status = "okay";
+ reg = <0xff638000 0x100
+ 0xff638c00 0x100>;
+ interrupts = <0 52 1>;
+ interrupt-names = "ddr_bandwidth";
+ };
+ dmc_monitor {
+ compatible = "amlogic, dmc_monitor";
+ status = "okay";
+ reg_base = <0xff639000>;
+ interrupts = <0 51 1>;
+ };
+
+ isp_sc: isp-sc@ff655400 {
+ compatible = "amlogic, isp-sc";
+ reg = <0xff655400 0x00001000>;
+ reg-names = "isp_sc";
+ interrupts = <0 17 0>;
+ interrupt-names = "isp_sc";
+ };
+
+ isp: isp@ff140000 {
+ compatible = "arm, isp";
+ reg = <0xff140000 0x00040000>;
+ reg-names = "ISP";
+ interrupts = <0 142 4>;
+ interrupt-names = "ISP";
+ clocks = <&clkc CLKID_MIPI_ISP_CLK_COMP>,
+ <&clkc CLKID_MIPI_CSI_PHY_CLK0_COMP>;
+ clock-names = "cts_mipi_isp_clk_composite",
+ "cts_mipi_csi_phy_clk0_composite";
+ link-device = <&isp_sc>;
+ };
+
+ adapter: isp-adapter@ff650000 {
+ compatible = "amlogic, isp-adapter";
+ reg = <0xff650000 0x00006000>;
+ reg-names = "adapter";
+ interrupts = <0 179 0>;
+ interrupt-names = "adapter-irq";
+ };
+
+ phycsi: phy-csi@ff650000 {
+ compatible = "amlogic, phy-csi";
+ reg = <0xff650000 0x00002000>,
+ <0xff652000 0x00002000>,
+ <0xff63c300 0x00000100>,
+ <0xff654000 0x00000100>,
+ <0xff654400 0x00000100>;
+ reg-names = "csi2_phy0", "csi2_phy1", "aphy_reg",
+ "csi0_host", "csi1_host";
+ interrupts = <0 41 0>,
+ <0 42 0>,
+ <0 72 0>,
+ <0 74 0>,
+ <0 87 0>,
+ <0 88 0>;
+ interrupt-names = "phy0-irq",
+ "phy1-irq",
+ "csi-host0-intr2",
+ "csi-host0-intr1",
+ "csi-host1-intr2",
+ "csi-host1-intr1";
+ link-device = <&adapter>;
+ };
+};/* end of / */
+
+&pinctrl_aobus {
+ ao_uart_pins:ao_uart {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ ao_b_uart_pins:ao_b_uart {
+ mux {
+ groups = "uart_ao_tx_b_2",
+ "uart_ao_rx_b_3";
+ function = "uart_ao_b";
+ };
+ };
+
+ ao_i2c_master_pins1:ao_i2c_pins1 {
+ mux {
+ groups = "i2c_ao_sck",
+ "i2c_ao_sda";
+ function = "i2c_ao";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_master_pins2:ao_i2c_pins2 {
+ mux {
+ groups = "i2c_ao_sck_e",
+ "i2c_ao_sda_e";
+ function = "i2c_ao";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ ao_i2c_slave_pins:ao_i2c_slave_pins {
+ mux {
+ groups = "i2c_ao_slave_sck",
+ "i2c_ao_slave_sda";
+ function = "i2c_ao_slave";
+ };
+ };
+
+ pwm_ao_a_pins: pwm_ao_a {
+ mux {
+ groups = "pwm_ao_a";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_a_hiz_pins: pwm_ao_a_hiz {
+ mux {
+ groups = "pwm_ao_a_hiz";
+ function = "pwm_ao_a";
+ };
+ };
+
+ pwm_ao_b_pins: pwm_ao_b {
+ mux {
+ groups = "pwm_ao_b";
+ function = "pwm_ao_b";
+ };
+ };
+
+ pwm_ao_c_pins1: pwm_ao_c_pins1 {
+ mux {
+ groups = "pwm_ao_c_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_pins2: pwm_ao_c_pins2 {
+ mux {
+ groups = "pwm_ao_c_6";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_c_hiz_pins: pwm_ao_c_hiz {
+ mux {
+ groups = "pwm_ao_c_hiz_4";
+ function = "pwm_ao_c";
+ };
+ };
+
+ pwm_ao_d_pins1: pwm_ao_d_pins1 {
+ mux {
+ groups = "pwm_ao_d_5";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins2: pwm_ao_d_pins2 {
+ mux {
+ groups = "pwm_ao_d_10";
+ function = "pwm_ao_d";
+ };
+ };
+
+ pwm_ao_d_pins3: pwm_ao_d_pins3 {
+ mux {
+ groups = "pwm_ao_d_e";
+ function = "pwm_ao_d";
+ };
+ };
+
+ aocec_a: ao_ceca {
+ mux {
+ groups = "cec_ao_a";
+ function = "cec_ao";
+ };
+ };
+
+ aocec_b: ao_cecb {
+ mux {
+ groups = "cec_ao_b";
+ function = "cec_ao";
+ };
+ };
+ pwm_a_e2: pwm_a_e2 {
+ mux {
+ groups = "pwm_a_e2";
+ function = "pwm_a_gpioe";
+ };
+ };
+};
+
+&pinctrl_periphs {
+ /* sdemmc portC */
+ emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+ mux {
+ groups = "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ emmc_conf_pull_up:emmc_conf_pull_up {
+ mux {
+ groups = "emmc_nand_d7",
+ "emmc_nand_d6",
+ "emmc_nand_d5",
+ "emmc_nand_d4",
+ "emmc_nand_d3",
+ "emmc_nand_d2",
+ "emmc_nand_d1",
+ "emmc_nand_d0",
+ "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ emmc_conf_pull_done:emmc_conf_pull_done {
+ mux {
+ groups = "emmc_nand_ds";
+ function = "emmc";
+ input-enable;
+ bias-pull-down;
+ drive-strength = <3>;
+ };
+ };
+
+ /* sdemmc portB */
+ sd_clk_cmd_pins:sd_clk_cmd_pins {
+ mux {
+ groups = "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sd_all_pins:sd_all_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a_c3",
+ "uart_ao_rx_a_c2";
+ function = "uart_ao_a_ee";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+ /* sdemmc portA */
+ sdio_clk_cmd_pins:sdio_clk_cmd_pins {
+ mux {
+ groups = "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+
+ sdio_all_pins:sdio_all_pins {
+ mux {
+ groups = "sdio_d0",
+ "sdio_d1",
+ "sdio_d2",
+ "sdio_d3",
+ "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ drive-strength = <3>;
+ };
+ };
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr",
+ "nand_rb0";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0";
+ function = "nand";
+ };
+ };
+
+ i2c0_master_pins1:i2c0_pins1 {
+ mux {
+ groups = "i2c0_sda_c",
+ "i2c0_sck_c";
+ function = "i2c0";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins2:i2c0_pins2 {
+ mux {
+ groups = "i2c0_sda_z0",
+ "i2c0_sck_z1";
+ function = "i2c0";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c0_master_pins3:i2c0_pins3 {
+ mux {
+ groups = "i2c0_sda_z7",
+ "i2c0_sck_z8";
+ function = "i2c0";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins1:i2c1_pins1 {
+ mux {
+ groups = "i2c1_sda_x",
+ "i2c1_sck_x";
+ function = "i2c1";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins2:i2c1_pins2 {
+ mux {
+ groups = "i2c1_sda_h2",
+ "i2c1_sck_h3";
+ function = "i2c1";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c1_master_pins3:i2c1_pins3 {
+ mux {
+ groups = "i2c1_sda_h6",
+ "i2c1_sck_h7";
+ function = "i2c1";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins1:i2c2_pins1 {
+ mux {
+ groups = "i2c2_sda_x",
+ "i2c2_sck_x";
+ function = "i2c2";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c2_master_pins2:i2c2_pins2 {
+ mux {
+ groups = "i2c2_sda_z",
+ "i2c2_sck_z";
+ function = "i2c2";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins1:i2c3_pins1 {
+ mux {
+ groups = "i2c3_sda_h",
+ "i2c3_sck_h";
+ function = "i2c3";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ i2c3_master_pins2:i2c3_pins2 {
+ mux {
+ groups = "i2c3_sda_a",
+ "i2c3_sck_a";
+ function = "i2c3";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ pwm_a_pins: pwm_a {
+ mux {
+ groups = "pwm_a";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm_b_pins1 {
+ mux {
+ groups = "pwm_b_x7";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm_b_pins2 {
+ mux {
+ groups = "pwm_b_x19";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins3: pwm_b_pins3 {
+ mux {
+ groups = "pwm_b_h";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins4: pwm_b_pins4 {
+ mux {
+ groups = "pwm_b_z0";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins5: pwm_b_pins5 {
+ mux {
+ groups = "pwm_b_z13";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm_c_pins1 {
+ mux {
+ groups = "pwm_c_c4";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm_c_pins2 {
+ mux {
+ groups = "pwm_c_x5";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins3: pwm_c_pins3 {
+ mux {
+ groups = "pwm_c_x8";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins4: pwm_c_pins4 {
+ mux {
+ groups = "pwm_c_z";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm_d_pins1 {
+ mux {
+ groups = "pwm_d_x3";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm_d_pins2 {
+ mux {
+ groups = "pwm_d_x6";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins3: pwm_d_pins3 {
+ mux {
+ groups = "pwm_d_z";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins4: pwm_d_pins4 {
+ mux {
+ groups = "pwm_d_a4";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins: pwm_e {
+ mux {
+ groups = "pwm_e";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_f_pins1: pwm_f_pins1 {
+ mux {
+ groups = "pwm_f_x";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm_f_pins2 {
+ mux {
+ groups = "pwm_f_h";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins3: pwm_f_pins3 {
+ mux {
+ groups = "pwm_f_z";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins4: pwm_f_pins4 {
+ mux {
+ groups = "pwm_f_a11";
+ function = "pwm_f";
+ };
+ };
+
+ spicc0_pins_x: spicc0_pins_x {
+ mux {
+ groups = "spi0_mosi_x",
+ "spi0_miso_x",
+ //"spi0_ss0_x",
+ "spi0_clk_x";
+ function = "spi0";
+ drive-strength = <1>;
+ };
+ };
+
+ spicc1_pins: spicc1_pins {
+ mux {
+ groups = "spi1_mosi",
+ "spi1_miso",
+ //"spi1_ss0",
+ "spi1_clk";
+ function = "spi1";
+ drive-strength = <1>;
+ };
+ };
+
+ a_uart_pins:a_uart {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a",
+ "uart_cts_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ b_uart_pins:b_uart {
+ mux {
+ groups = "uart_tx_b",
+ "uart_rx_b";
+ function = "uart_b";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c";
+ function = "uart_c";
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmitx_hpd_in";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ hdmitx_hpd_gpio: hdmitx_hpd_gpio {
+ mux {
+ groups = "GPIOH_1";
+ function = "gpio_periphs";
+ bias-disable;
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmitx_sda",
+ "hdmitx_sck";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ eecec_a: ee_ceca {
+ mux {
+ groups = "cec_ao_a_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ eecec_b: ee_cecb {
+ mux {
+ groups = "cec_ao_b_ee";
+ function = "cec_ao_ee";
+ };
+ };
+
+ internal_eth_pins: internal_eth_pins {
+ mux {
+ groups = "eth_link_led",
+ "eth_act_led";
+ function = "eth";
+ };
+ };
+
+ external_eth_pins: external_eth_pins {
+ mux {
+ groups = "eth_mdio",
+ "eth_mdc",
+ "eth_rgmii_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd0",
+ "eth_rxd1",
+ "eth_rxd2_rgmii",
+ "eth_rxd3_rgmii",
+ "eth_rgmii_tx_clk",
+ "eth_txen",
+ "eth_txd0",
+ "eth_txd1",
+ "eth_txd2_rgmii",
+ "eth_txd3_rgmii";
+ function = "eth";
+ drive-strength = <3>;
+ };
+ };
+
+ irblaster_pins2:irblaster_pins2 {
+ mux {
+ groups = "remote_out_h";
+ function = "remote_out";
+ };
+ };
+
+ irblaster_pins3:irblaster_pins3 {
+ mux {
+ groups = "remote_out_z";
+ function = "remote_out";
+ };
+ };
+};
+
+&gpu{
+ system-coherency = <0>;
+ tbl = <&dvfs285_cfg
+ &dvfs400_cfg
+ &dvfs500_cfg
+ &dvfs666_cfg
+ &dvfs800_cfg
+ &dvfs800_cfg>;
+};
+
+&pinctrl_aobus {
+ sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOAO_0",
+ "GPIOAO_1";
+ function = "gpio_aobus";
+ };
+ };
+
+ sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ remote_pins:remote_pin {
+ mux {
+ groups = "remote_input_ao";
+ function = "remote_input_ao";
+ };
+ };
+
+ irblaster_pins:irblaster_pin {
+ mux {
+ groups = "remote_out_ao";
+ function = "remote_out_ao";
+ };
+ };
+
+ irblaster_pins1:irblaster_pin1 {
+ mux {
+ groups = "remote_out_ao9";
+ function = "remote_out_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/mesong12b_skt-panel.dtsi
+ *
+ * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+ lcd{
+ compatible = "amlogic, lcd-g12b";
+ mode = "tablet";
+ status = "okay";
+ key_valid = <0>;
+ clocks = <&clkc CLKID_MIPI_DSI_HOST
+ &clkc CLKID_MIPI_DSI_PHY
+ &clkc CLKID_DSI_MEAS_COMP
+ &clkc CLKID_VCLK2_ENCL
+ &clkc CLKID_VCLK2_VENCL
+ &clkc CLKID_GP0_PLL>;
+ clock-names = "dsi_host_gate",
+ "dsi_phy_gate",
+ "dsi_meas",
+ "encl_top_gate",
+ "encl_int_gate",
+ "gp0_pll";
+ reg = <0xffd07000 0x400 /* dsi_host */
+ 0xff644000 0x200>; /* dsi_phy */
+ interrupts = <0 3 1
+ 0 56 1>;
+ interrupt-names = "vsync","vsync2";
+ pinctrl_version = <2>; /* for uboot */
+
+ /* power type:
+ * (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
+ * power index:
+ * (point gpios_index, or extern_index,0xff=invalid)
+ * power value:(0=output low, 1=output high, 2=input)
+ * power delay:(unit in ms)
+ */
+ lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
+ lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
+
+ lcd_0{
+ model_name = "B080XAN01";
+ interface = "mipi";
+ basic_setting = <768 1024 /*h_active, v_active*/
+ 948 1140 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 119 159>; /*screen_widht, screen_height*/
+ lcd_timing = <64 56 0 /*hs_width, hs_bp, hs_pol*/
+ 50 30 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+ 0 /*clk_ss_level */
+ 1 /*clk_auto_generate*/
+ 64843200>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <4 /*lane_num*/
+ 550 /*bit_rate_max(MHz)*/
+ 0 /*factor(*100, default 0 for auto)*/
+ 1 /*operation_mode_init(0=video, 1=command)*/
+ 0 /*operation_mode_display(0=video, 1=command)*/
+ 2 /*
+ *video_mode_type
+ *(0=sync_pulse,1=sync_event,2=burst)
+ */
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+ /* dsi_init: data_type, num, data... */
+ dsi_init_on = <0x05 1 0x11
+ 0xfd 1 20 /*delay(ms)*/
+ 0x05 1 0x29
+ 0xfd 1 20 /*delay(ms)*/
+ 0xff 0>; /*ending*/
+ dsi_init_off = <0x05 1 0x28
+ 0xfd 1 10 /*delay(ms)*/
+ 0x05 1 0x10
+ 0xfd 1 10 /*delay(ms)*/
+ 0xff 0>; /*ending*/
+ extern_init = <0xff>; /*0xff for invalid*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 1 0 100
+ 0 0 0 10
+ 0 0 1 20
+ 2 0 0 0
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 50
+ 0 0 0 10
+ 0 1 1 100
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+
+ lcd_1{
+ model_name = "TL070WSH27";
+ interface = "mipi";
+ basic_setting = <1024 600 /*h_active, v_active*/
+ 1250 630 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 154 86>; /*screen_widht, screen_height*/
+ lcd_timing = <80 100 0 /*hs_width, hs_bp, hs_pol*/
+ 5 20 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+ 0 /*clk_ss_level */
+ 1 /*clk_auto_generate*/
+ 47250000>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <4 /*lane_num*/
+ 300 /*bit_rate_max(MHz)*/
+ 0 /*factor(*100, default 0 for auto)*/
+ 1 /*operation_mode_init(0=video, 1=command)*/
+ 0 /*operation_mode_display(0=video, 1=command)*/
+ 2 /*
+ *video_mode_type
+ *(0=sync_pulse,1=sync_event,2=burst)
+ */
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+ /* dsi_init: data_type, num, data... */
+ dsi_init_on = <0x05 1 0x11
+ 0xfd 1 200 /*delay(ms)*/
+ 0x05 1 0x29
+ 0xfd 1 20 /*delay(ms)*/
+ 0xff 0>; /*ending*/
+ dsi_init_off = <0x05 1 0x28
+ 0xfd 1 10 /*delay(ms)*/
+ 0x05 1 0x10
+ 0xfd 1 10 /*delay(ms)*/
+ 0xff 0>; /*ending*/
+ extern_init = <0xff>; /*0xff for invalid*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 1 0 100
+ 0 0 0 10
+ 0 0 1 20
+ 2 0 0 0
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 50
+ 0 0 0 10
+ 0 1 1 100
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+
+ lcd_2{
+ model_name = "TL070HDV03CT";
+ interface = "mipi";
+ basic_setting = <720 1280 /*h_active, v_active*/
+ 970 1364 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 87 154>; /*screen_widht, screen_height*/
+ lcd_timing = <10 120 0 /*hs_width, hs_bp, hs_pol*/
+ 4 40 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
+ 0 /*clk_ss_level */
+ 1 /*clk_auto_generate*/
+ 79385000>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <4 /*lane_num*/
+ 500 /*bit_rate_max(MHz)*/
+ 0 /*factor(*100, default 0 for auto)*/
+ 1 /*operation_mode_init(0=video, 1=command)*/
+ 0 /*operation_mode_display(0=video, 1=command)*/
+ 2 /*
+ *video_mode_type
+ *(0=sync_pulse,1=sync_event,2=burst)
+ */
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+
+ /* dsi_init: data_type, num, data... */
+ dsi_init_on = <0xff 0>; /*ending*/
+ dsi_init_off = <0xff 0>; /*ending*/
+ extern_init = <1>; /*0xff for invalid*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 1 0 100
+ 0 0 0 10
+ 0 0 1 20
+ 2 0 0 0
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 50
+ 0 0 0 10
+ 0 1 1 100
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+
+ lcd_3{
+ model_name = "P070ACB_FT";
+ interface = "mipi";
+ basic_setting = <600 1024 /*h_active, v_active*/
+ 770 1070 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 3 5>; /*screen_widht, screen_height*/
+ lcd_timing = <10 80 0 /*hs_width,hs_bp,hs_pol*/
+ 6 20 0>; /*vs_width,vs_bp,vs_pol*/
+ clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
+ 0 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 49434000>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <4 /*lane_num*/
+ 400 /*bit_rate_max(MHz)*/
+ 0 /*factor(*100, default 0 for auto)*/
+ 1 /*operation_mode_init(0=video, 1=command)*/
+ 0 /*operation_mode_display(0=video, 1=command)*/
+ 2 /*
+ *video_mode_type
+ *(0=sync_pulse,1=sync_event,2=burst)
+ */
+ 0 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
+ /* dsi_init: data_type, num, data... */
+ dsi_init_on = <
+ 0xff 10
+ 0xf0 3 0 1 30 /* reset high, delay 30ms */
+ 0xf0 3 0 0 10 /* reset low, delay 10ms */
+ 0xf0 3 0 1 30 /* reset high, delay 30ms */
+ 0xfc 2 0x04 3 /* check_reg, check_cnt */
+ 0xff 0>; /* ending flag */
+ dsi_init_off = <0xff 0>; /* ending flag */
+ /* extern_init: 0xff for invalid */
+ extern_init = <2>;
+ /* power step: type,index,value,delay(ms) */
+ power_on_step = <
+ 0 1 0 200 /* panel power on */
+ 2 0 0 0
+ 0xff 0 0 0>;
+ power_off_step = <
+ 2 0 0 0
+ 0 0 0 20 /* reset low */
+ 0 1 1 100 /* panel power off */
+ 0xff 0 0 0>;
+ backlight_index = <0>;
+ };
+ };
+
+ lcd_extern{
+ compatible = "amlogic, lcd_extern";
+ status = "okay";
+ i2c_bus = "i2c_bus_0";
+ key_valid = <0>;
+
+ extern_0{
+ index = <0>;
+ extern_name = "mipi_default";/*default*/
+ status = "okay";
+ type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+ cmd_size = <0xff>;
+ init_on = <
+ 0xfd 1 10
+ 0x05 1 0x11
+ 0xfd 1 120 /* delay 120ms */
+ 0x05 1 0x29
+ 0xff 0>; /*ending*/
+ init_off = <
+ 0x05 1 0x28 /* display off */
+ 0xfd 1 10 /* delay 10ms */
+ 0x05 1 0x10 /* sleep in */
+ 0xfd 1 150 /* delay 150ms */
+ 0xff 0>; /*ending*/
+ };
+
+ extern_1{
+ index = <1>;
+ extern_name = "mipi_default";/*TL070HDV03CT*/
+ status = "okay";
+ type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+ cmd_size = <0xff>;
+ init_on = <
+ 0x39 4 0xFF 0x98 0x81 0x03
+ 0x15 2 0x01 0x00
+ 0x15 2 0x02 0x00
+ 0x15 2 0x03 0x72
+ 0x15 2 0x04 0x00
+ 0x15 2 0x05 0x00
+ 0x15 2 0x06 0x09
+ 0x15 2 0x07 0x00
+ 0x15 2 0x08 0x00
+ 0x15 2 0x09 0x01
+ 0x15 2 0x0A 0x00
+ 0x15 2 0x0B 0x00
+ 0x15 2 0x0C 0x01
+ 0x15 2 0x0D 0x00
+ 0x15 2 0x0E 0x00
+ 0x15 2 0x0F 0x14
+ 0x15 2 0x10 0x14
+ 0x15 2 0x11 0x00
+ 0x15 2 0x12 0x00
+ 0x15 2 0x13 0x00
+ 0x15 2 0x14 0x00
+ 0x15 2 0x15 0x00
+ 0x15 2 0x16 0x00
+ 0x15 2 0x17 0x00
+ 0x15 2 0x18 0x00
+ 0x15 2 0x19 0x00
+ 0x15 2 0x1A 0x00
+ 0x15 2 0x1B 0x00
+ 0x15 2 0x1C 0x00
+ 0x15 2 0x1D 0x00
+ 0x15 2 0x1E 0x40
+ 0x15 2 0x1F 0x80
+ 0x15 2 0x20 0x05
+ 0x15 2 0x21 0x02
+ 0x15 2 0x22 0x00
+ 0x15 2 0x23 0x00
+ 0x15 2 0x24 0x00
+ 0x15 2 0x25 0x00
+ 0x15 2 0x26 0x00
+ 0x15 2 0x27 0x00
+ 0x15 2 0x28 0x33
+ 0x15 2 0x29 0x02
+ 0x15 2 0x2A 0x00
+ 0x15 2 0x2B 0x00
+ 0x15 2 0x2C 0x00
+ 0x15 2 0x2D 0x00
+ 0x15 2 0x2E 0x00
+ 0x15 2 0x2F 0x00
+ 0x15 2 0x30 0x00
+ 0x15 2 0x31 0x00
+ 0x15 2 0x32 0x00
+ 0x15 2 0x33 0x00
+ 0x15 2 0x34 0x04
+ 0x15 2 0x35 0x00
+ 0x15 2 0x36 0x00
+ 0x15 2 0x37 0x00
+ 0x15 2 0x38 0x3C
+ 0x15 2 0x39 0x00
+ 0x15 2 0x3A 0x00
+ 0x15 2 0x3B 0x00
+ 0x15 2 0x3C 0x00
+ 0x15 2 0x3D 0x00
+ 0x15 2 0x3E 0x00
+ 0x15 2 0x3F 0x00
+ 0x15 2 0x40 0x00
+ 0x15 2 0x41 0x00
+ 0x15 2 0x42 0x00
+ 0x15 2 0x43 0x00
+ 0x15 2 0x44 0x00
+
+ 0x15 2 0x50 0x10
+ 0x15 2 0x51 0x32
+ 0x15 2 0x52 0x54
+ 0x15 2 0x53 0x76
+ 0x15 2 0x54 0x98
+ 0x15 2 0x55 0xBA
+ 0x15 2 0x56 0x10
+ 0x15 2 0x57 0x32
+ 0x15 2 0x58 0x54
+ 0x15 2 0x59 0x76
+ 0x15 2 0x5A 0x98
+ 0x15 2 0x5B 0xBA
+ 0x15 2 0x5C 0xDC
+ 0x15 2 0x5D 0xFE
+ 0x15 2 0x5E 0x00
+ 0x15 2 0x5F 0x0E
+ 0x15 2 0x60 0x0F
+ 0x15 2 0x61 0x0C
+ 0x15 2 0x62 0x0D
+ 0x15 2 0x63 0x06
+ 0x15 2 0x64 0x07
+ 0x15 2 0x65 0x02
+ 0x15 2 0x66 0x02
+ 0x15 2 0x67 0x02
+ 0x15 2 0x68 0x02
+ 0x15 2 0x69 0x01
+ 0x15 2 0x6A 0x00
+ 0x15 2 0x6B 0x02
+ 0x15 2 0x6C 0x15
+ 0x15 2 0x6D 0x14
+ 0x15 2 0x6E 0x02
+ 0x15 2 0x6F 0x02
+ 0x15 2 0x70 0x02
+ 0x15 2 0x71 0x02
+ 0x15 2 0x72 0x02
+ 0x15 2 0x73 0x02
+ 0x15 2 0x74 0x02
+ 0x15 2 0x75 0x0E
+ 0x15 2 0x76 0x0F
+ 0x15 2 0x77 0x0C
+ 0x15 2 0x78 0x0D
+ 0x15 2 0x79 0x06
+ 0x15 2 0x7A 0x07
+ 0x15 2 0x7B 0x02
+ 0x15 2 0x7C 0x02
+ 0x15 2 0x7D 0x02
+ 0x15 2 0x7E 0x02
+ 0x15 2 0x7F 0x01
+ 0x15 2 0x80 0x00
+ 0x15 2 0x81 0x02
+ 0x15 2 0x82 0x14
+ 0x15 2 0x83 0x15
+ 0x15 2 0x84 0x02
+ 0x15 2 0x85 0x02
+ 0x15 2 0x86 0x02
+ 0x15 2 0x87 0x02
+ 0x15 2 0x88 0x02
+ 0x15 2 0x89 0x02
+ 0x15 2 0x8A 0x02
+
+ 0x39 4 0xFF 0x98 0x81 0x04
+ 0x15 2 0x6C 0x15
+ 0x15 2 0x6E 0x2A
+ 0x15 2 0x6F 0x33 /* 33 */
+ 0x15 2 0x3A 0x94
+ 0x15 2 0x8D 0x14
+ 0x15 2 0x87 0xBA
+ 0x15 2 0x26 0x76
+ 0x15 2 0xB2 0xD1
+ 0x15 2 0xB5 0x06
+
+ 0x39 4 0xFF 0x98 0x81 0x01
+ 0x15 2 0x22 0x02 /* xiugai RGB */
+ 0x15 2 0x31 0x00 /* dot inv */
+ /*0x15 2 0x52 0x00*/
+ 0x15 2 0x53 0x72 /* vcom */
+ /*0x15 2 0x54 0x00 // vcom */
+ 0x15 2 0x55 0x88
+
+ 0x15 2 0x40 0x33
+
+ 0x15 2 0x50 0x96
+ 0x15 2 0x51 0x96
+
+ 0x15 2 0x60 0x08
+
+ 0x15 2 0xA0 0x08 /* GAMMA P */
+ 0x15 2 0xA1 0x1D
+ 0x15 2 0xA2 0x2A
+ 0x15 2 0xA3 0x10
+ 0x15 2 0xA4 0x15
+ 0x15 2 0xA5 0x28
+ 0x15 2 0xA6 0x1C
+ 0x15 2 0xA7 0x1D
+ 0x15 2 0xA8 0x7E
+ 0x15 2 0xA9 0x1D
+ 0x15 2 0xAA 0x29
+ 0x15 2 0xAB 0x6B
+ 0x15 2 0xAC 0x1A
+ 0x15 2 0xAD 0x18
+ 0x15 2 0xAE 0x4B
+ 0x15 2 0xAF 0x20
+ 0x15 2 0xB0 0x27
+ 0x15 2 0xB1 0x50
+ 0x15 2 0xB2 0x64
+ 0x15 2 0xB3 0x39
+
+ 0x15 2 0xC0 0x08 /* GAMMA N */
+ 0x15 2 0xC1 0x1D
+ 0x15 2 0xC2 0x2A
+ 0x15 2 0xC3 0x10
+ 0x15 2 0xC4 0x15
+ 0x15 2 0xC5 0x28
+ 0x15 2 0xC6 0x1C
+ 0x15 2 0xC7 0x1D
+ 0x15 2 0xC8 0x7E
+ 0x15 2 0xC9 0x1D
+ 0x15 2 0xCA 0x29
+ 0x15 2 0xCB 0x6B
+ 0x15 2 0xCC 0x1A
+ 0x15 2 0xCD 0x18
+ 0x15 2 0xCE 0x4B
+ 0x15 2 0xCF 0x20
+ 0x15 2 0xD0 0x27
+ 0x15 2 0xD1 0x50
+ 0x15 2 0xD2 0x64
+ 0x15 2 0xD3 0x39
+
+ 0x39 4 0xFF 0x98 0x81 0x00
+
+ 0x15 2 0x3A 0x77
+ 0xfd 1 2
+
+ 0x15 2 0x36 0x08
+
+ 0x05 1 0x11 /* display on */
+ 0xfd 1 200
+
+ 0x05 1 0x29 /* display on */
+ 0xfd 1 200
+ 0xFF 0>; /*ending*/
+ init_off = <
+ 0x05 1 0x28 /* display off */
+ 0xfd 1 10 /* delay 10ms */
+ 0x05 1 0x10 /* sleep in */
+ 0xfd 1 150 /* delay 150ms */
+ 0xff 0>; /*ending*/
+ };
+
+ extern_2{
+ index = <2>;
+ extern_name = "mipi_default";/*P070ACB_FT*/
+ status = "okay";
+ type = <2>; /* 0=i2c, 1=spi, 2=mipi */
+ cmd_size = <0xff>;
+ init_on = <
+ 0x23 2 0xE0 0x00 /* Page 0 */
+ 0x23 2 0xE1 0x93 /* PASSWORD */
+ 0x23 2 0xE2 0x65
+ 0x23 2 0xE3 0xF8
+ 0x23 2 0x80 0x03
+ 0x23 2 0xE0 0x01 /* Page 01 */
+ 0x23 2 0x0C 0x74 /* Set PWRIC */
+ 0x23 2 0x17 0x00 /* Set Gamma Power */
+ 0x23 2 0x18 0xEF /* VGMP=5.1V */
+ 0x23 2 0x19 0x00
+ 0x23 2 0x1A 0x00
+ 0x23 2 0x1B 0xEF /* VGMN=-5.1V */
+ 0x23 2 0x1C 0x00
+ 0x23 2 0x1F 0x70 /* Set Gate Power */
+ 0x23 2 0x20 0x2D
+ 0x23 2 0x21 0x2D
+ 0x23 2 0x22 0x7E
+ 0x23 2 0x26 0xF3 /* VDDD from IOVCC */
+ 0x23 2 0x37 0x09 /* SetPanel */
+ 0x23 2 0x38 0x04 /* SET RGBCYC */
+ 0x23 2 0x39 0x00
+ 0x23 2 0x3A 0x01
+ 0x23 2 0x3C 0x90
+ 0x23 2 0x3D 0xFF
+ 0x23 2 0x3E 0xFF
+ 0x23 2 0x3F 0xFF
+ 0x23 2 0x40 0x02 /* Set TCON */
+ 0x23 2 0x41 0x80
+ 0x23 2 0x42 0x99
+ 0x23 2 0x43 0x14
+ 0x23 2 0x44 0x19
+ 0x23 2 0x45 0x5A
+ 0x23 2 0x4B 0x04
+ 0x23 2 0x55 0x02 /* power voltage */
+ 0x23 2 0x56 0x01
+ 0x23 2 0x57 0x69
+ 0x23 2 0x58 0x0A
+ 0x23 2 0x59 0x0A
+ 0x23 2 0x5A 0x2E /* VGH = 16.2V */
+ 0x23 2 0x5B 0x19 /* VGL = -12V */
+ 0x23 2 0x5C 0x15
+ 0x23 2 0x5D 0x77 /* Gamma */
+ 0x23 2 0x5E 0x56
+ 0x23 2 0x5F 0x45
+ 0x23 2 0x60 0x38
+ 0x23 2 0x61 0x35
+ 0x23 2 0x62 0x27
+ 0x23 2 0x63 0x2D
+ 0x23 2 0x64 0x18
+ 0x23 2 0x65 0x33
+ 0x23 2 0x66 0x34
+ 0x23 2 0x67 0x35
+ 0x23 2 0x68 0x56
+ 0x23 2 0x69 0x45
+ 0x23 2 0x6A 0x4F
+ 0x23 2 0x6B 0x42
+ 0x23 2 0x6C 0x40
+ 0x23 2 0x6D 0x34
+ 0x23 2 0x6E 0x25
+ 0x23 2 0x6F 0x02
+ 0x23 2 0x70 0x77
+ 0x23 2 0x71 0x56
+ 0x23 2 0x72 0x45
+ 0x23 2 0x73 0x38
+ 0x23 2 0x74 0x35
+ 0x23 2 0x75 0x27
+ 0x23 2 0x76 0x2D
+ 0x23 2 0x77 0x18
+ 0x23 2 0x78 0x33
+ 0x23 2 0x79 0x34
+ 0x23 2 0x7A 0x35
+ 0x23 2 0x7B 0x56
+ 0x23 2 0x7C 0x45
+ 0x23 2 0x7D 0x4F
+ 0x23 2 0x7E 0x42
+ 0x23 2 0x7F 0x40
+ 0x23 2 0x80 0x34
+ 0x23 2 0x81 0x25
+ 0x23 2 0x82 0x02
+ 0x23 2 0xE0 0x02 /* Page2 */
+ 0x23 2 0x00 0x53
+ /* GIP_L Pin mapping RESET_EVEN */
+ 0x23 2 0x01 0x55 /* VSSG_EVEN */
+ 0x23 2 0x02 0x55 /* VSSA_EVEN */
+ 0x23 2 0x03 0x51 /* STV2_EVEN */
+ 0x23 2 0x04 0x77 /* VDD2_EVEN */
+ 0x23 2 0x05 0x57 /* VDD1_EVEN */
+ 0x23 2 0x06 0x1F
+ 0x23 2 0x07 0x4F /* CK12 */
+ 0x23 2 0x08 0x4D /* CK10 */
+ 0x23 2 0x09 0x1F
+ 0x23 2 0x0A 0x4B /* CK8 */
+ 0x23 2 0x0B 0x49 /* CK6 */
+ 0x23 2 0x0C 0x1F
+ 0x23 2 0x0D 0x47 /* CK4 */
+ 0x23 2 0x0E 0x45 /* CK2 */
+ 0x23 2 0x0F 0x41 /* STV1_EVEN */
+ 0x23 2 0x10 0x1F
+ 0x23 2 0x11 0x1F
+ 0x23 2 0x12 0x1F
+ 0x23 2 0x13 0x55 /* VGG */
+ 0x23 2 0x14 0x1F
+ 0x23 2 0x15 0x1F
+ 0x23 2 0x16 0x52
+ /* GIP_R Pin mapping RESET_ODD */
+ 0x23 2 0x17 0x55 /* VSSG_ODD */
+ 0x23 2 0x18 0x55 /* VSSA_ODD */
+ 0x23 2 0x19 0x50 /* STV2_ODD */
+ 0x23 2 0x1A 0x77 /* VDD2_ODD */
+ 0x23 2 0x1B 0x57 /* VDD1_ODD */
+ 0x23 2 0x1C 0x1F
+ 0x23 2 0x1D 0x4E /* CK11 */
+ 0x23 2 0x1E 0x4C /* CK9 */
+ 0x23 2 0x1F 0x1F
+ 0x23 2 0x20 0x4A /* CK7 */
+ 0x23 2 0x21 0x48 /* CK5 */
+ 0x23 2 0x22 0x1F
+ 0x23 2 0x23 0x46 /* CK3 */
+ 0x23 2 0x24 0x44 /* CK1 */
+ 0x23 2 0x25 0x40 /* STV1_ODD */
+ 0x23 2 0x26 0x1F
+ 0x23 2 0x27 0x1F
+ 0x23 2 0x28 0x1F
+ 0x23 2 0x29 0x1F
+ 0x23 2 0x2A 0x1F
+ 0x23 2 0x2B 0x55 /* VGG */
+ 0x23 2 0x2C 0x12 /* GIP_L_GS Pin mapping */
+ 0x23 2 0x2D 0x15
+ 0x23 2 0x2E 0x15
+ 0x23 2 0x2F 0x00
+ 0x23 2 0x30 0x37
+ 0x23 2 0x31 0x17
+ 0x23 2 0x32 0x1F
+ 0x23 2 0x33 0x08
+ 0x23 2 0x34 0x0A
+ 0x23 2 0x35 0x1F
+ 0x23 2 0x36 0x0C
+ 0x23 2 0x37 0x0E
+ 0x23 2 0x38 0x1F
+ 0x23 2 0x39 0x04
+ 0x23 2 0x3A 0x06
+ 0x23 2 0x3B 0x10
+ 0x23 2 0x3C 0x1F
+ 0x23 2 0x3D 0x1F
+ 0x23 2 0x3E 0x1F
+ 0x23 2 0x3F 0x15
+ 0x23 2 0x40 0x1F
+ 0x23 2 0x41 0x1F
+ 0x23 2 0x42 0x13 /* GIP_R_GS Pin mapping */
+ 0x23 2 0x43 0x15
+ 0x23 2 0x44 0x15
+ 0x23 2 0x45 0x01
+ 0x23 2 0x46 0x37
+ 0x23 2 0x47 0x17
+ 0x23 2 0x48 0x1F
+ 0x23 2 0x49 0x09
+ 0x23 2 0x4A 0x0B
+ 0x23 2 0x4B 0x1F
+ 0x23 2 0x4C 0x0D
+ 0x23 2 0x4D 0x0F
+ 0x23 2 0x4E 0x1F
+ 0x23 2 0x4F 0x05
+ 0x23 2 0x50 0x07
+ 0x23 2 0x51 0x11
+ 0x23 2 0x52 0x1F
+ 0x23 2 0x53 0x1F
+ 0x23 2 0x54 0x1F
+ 0x23 2 0x55 0x1F
+ 0x23 2 0x56 0x1F
+ 0x23 2 0x57 0x15
+ 0x23 2 0x58 0x40 /* GIP Timing */
+ 0x23 2 0x59 0x00
+ 0x23 2 0x5A 0x00
+ 0x23 2 0x5B 0x10
+ 0x23 2 0x5C 0x14
+ 0x23 2 0x5D 0x40
+ 0x23 2 0x5E 0x01
+ 0x23 2 0x5F 0x02
+ 0x23 2 0x60 0x40
+ 0x23 2 0x61 0x03
+ 0x23 2 0x62 0x04
+ 0x23 2 0x63 0x7A
+ 0x23 2 0x64 0x7A
+ 0x23 2 0x65 0x74
+ 0x23 2 0x66 0x16
+ 0x23 2 0x67 0xB4
+ 0x23 2 0x68 0x16
+ 0x23 2 0x69 0x7A
+ 0x23 2 0x6A 0x7A
+ 0x23 2 0x6B 0x0C
+ 0x23 2 0x6C 0x00
+ 0x23 2 0x6D 0x04
+ 0x23 2 0x6E 0x04
+ 0x23 2 0x6F 0x88
+ 0x23 2 0x70 0x00
+ 0x23 2 0x71 0x00
+ 0x23 2 0x72 0x06
+ 0x23 2 0x73 0x7B
+ 0x23 2 0x74 0x00
+ 0x23 2 0x75 0xBC
+ 0x23 2 0x76 0x00
+ 0x23 2 0x77 0x04
+ 0x23 2 0x78 0x2C
+ 0x23 2 0x79 0x00
+ 0x23 2 0x7A 0x00
+ 0x23 2 0x7B 0x00
+ 0x23 2 0x7C 0x00
+ 0x23 2 0x7D 0x03
+ 0x23 2 0x7E 0x7B
+ 0x23 2 0xE0 0x04 /* Page4 */
+ 0x23 2 0x09 0x11 /* Set RGBCYC2 */
+ 0x23 2 0x0E 0x48
+ 0x23 2 0x2B 0x2B /* ESD Protect */
+ 0x23 2 0x2E 0x44
+ 0x23 2 0xE0 0x00 /* Page0 */
+ 0x23 2 0xE6 0x02 /* Watch dog */
+ 0x23 2 0xE7 0x0C
+ 0x05 1 0x11 /* sleep out */
+ 0xfd 1 120
+ 0x05 1 0x29 /* display on */
+ 0x05 1 0x35
+ 0xfd 1 20 /* delay(ms) */
+ 0xFF 0>; /*ending*/
+ init_off = <
+ 0x05 1 0x28 /* display off */
+ 0xfd 1 10 /* delay 10ms */
+ 0x05 1 0x10 /* sleep in */
+ 0xfd 1 150 /* delay 150ms */
+ 0xff 0>; /*ending*/
+ };
+ };
+
+ backlight{
+ compatible = "amlogic, backlight-g12b";
+ status = "okay";
+ key_valid = <0>;
+ pinctrl-names = "pwm_on","pwm_off";
+ pinctrl-0 = <&pwm_f_pins2>;
+ pinctrl-1 = <&bl_pwm_off_pins>;
+ pinctrl_version = <2>; /* for uboot */
+ bl_pwm_config = <&bl_pwm_conf>;
+ bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
+ &gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
+ bl_gpio_names = "GPIOH_4","GPIOH_5";
+
+ /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
+ /* power index:(point gpios_index, 0xff=invalid)
+ * power value:(0=output low, 1=output high, 2=input)
+ * power delay:(unit in ms)
+ */
+
+ backlight_0{
+ index = <0>;
+ bl_name = "backlight_pwm";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /*on_delay(ms), off_delay(ms)*/
+ bl_pwm_port = "PWM_F";
+ bl_pwm_attr = <0 /*pwm_method*/
+ 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25>; /*duty_max(%), duty_min(%)*/
+ bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
+ };
+ backlight_1{
+ index = <1>;
+ bl_name = "bl_extern";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <4>; /*1=pwm, 2=pwm_combo, 4=extern*/
+ bl_power_attr = <1 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /*on_delay(ms), off_delay(ms)*/
+ bl_extern_index = <0>;
+ };
+ };
+ bl_pwm_conf:bl_pwm_conf{
+ pwm_channel_0 {
+ pwm_port_index = <5>;
+ pwms = <&pwm_ef MESON_PWM_1 30040 0>;
+ };
+ };
+
+ bl_extern{
+ compatible = "amlogic, bl_extern";
+ status = "disabled";
+ i2c_bus = "i2c_bus_3";
+
+ extern_0{
+ index = <0>;
+ extern_name = "i2c_lp8556";
+ type = <0>; /*0=i2c, 1=spi, 2=mipi*/
+ i2c_address = <0x2c>; /*7bit i2c address*/
+ dim_max_min = <255 10>;
+ };
+
+ extern_1{
+ index = <1>;
+ extern_name = "mipi_lt070me05";
+ type = <2>; /*0=i2c, 1=spi, 2=mipi*/
+ dim_max_min = <255 10>;
+ };
+ };
+};/* end of panel */
+
projects / platform / kernel / linux-amlogic.git / commitdiff