pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf

The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index b5cb7858ffdcdf43bd399c61af2fc36d4b0c039b..c7c9bebab3faa65abe71287a8d55762ef7624691 100644 (file)
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3456,8 +3456,8 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
                                                         DRV_TYPE_IO_1V8_ONLY,
                                                         DRV_TYPE_IO_DEFAULT,
                                                         DRV_TYPE_IO_DEFAULT,
-                                                        0x0,
-                                                        0x8,
+                                                        0x80,
+                                                        0x88,
                                                         -1,
                                                         -1,
                                                         PULL_TYPE_IO_1V8_ONLY,
@@ -3473,10 +3473,10 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
                                        DRV_TYPE_IO_1V8_OR_3V0,
                                        DRV_TYPE_IO_1V8_OR_3V0,
                                        DRV_TYPE_IO_1V8_OR_3V0,
-                                       0x20,
-                                       0x28,
-                                       0x30,
-                                       0x38
+                                       0xa0,
+                                       0xa8,
+                                       0xb0,
+                                       0xb8
                                        ),
        PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0,
                                      DRV_TYPE_IO_1V8_OR_3V0,