static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
0x5e4322, 0x5e4322, 0x5e4322, 0x604322, 0x00a44f, 0x5ea44f
};
+
static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
0x5e4322, 0x00a44f, 0x5e4322, 0x604322, 0x5ea44f, 0x5ea44f
};
priv->rfa_txpowertrackingindex++;
priv->rfa_txpowertrackingindex_real++;
rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord, priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
-
}
}
priv->cck_present_attenuation_difference
priv->btxpower_tracking = true;
priv->txpower_count = 0;
priv->btxpower_trackingInit = false;
-
}
static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
/* 1.5 Higher EDCCA. */
/*PlatformEFIOWrite4Byte(pAdapter, rOFDM0_ECCAThreshold, 0x325);*/
return;
-
}
/* 2. When RSSI increase, We have to judge if it is larger than a threshold
/* 2.5 DIG On. */
rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */
-
}
dm_ctrl_initgain_byrssi_highpwr(dev);
write_nic_dword(dev, EDCAPARA_BE, edca_setting_UL[pHTInfo->IOTPeer]);
priv->bis_cur_rdlstate = false;
}
-
}
priv->bcurrent_turbo_EDCA = true;
write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
-
/* Check ACM bit.
* If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
*/
RT_TRACE(COMP_IO, "CheckPbcGPIO - PBC is pressed\n");
priv->bpbc_pressed = true;
}
-
}
/*-----------------------------------------------------------------------------
cck_rx_ver2_min_index = i;
}
}
-
}
}
}
priv->ContinueDiffCount = 0;
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
-
}
static void dm_StartSWFsync(struct net_device *dev)
add_timer(&priv->fsync_timer);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
-
}
static void dm_EndHWFsync(struct net_device *dev)
RT_TRACE(COMP_HALDM, "%s\n", __func__);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
write_nic_byte(dev, 0xc3b, 0x49);
-
}
void dm_check_fsync(struct net_device *dev)
#define EPROM_W_BIT BIT(1)
#define EPROM_R_BIT BIT(0)
};
+
//----------------------------------------------------------------------------
// 818xB AnaParm & AnaParm2 Register
//----------------------------------------------------------------------------
priv->force_reset = *extra;
mutex_unlock(&priv->wx_mutex);
return 0;
-
}
static int r8192_wx_set_rawtx(struct net_device *dev,
mutex_unlock(&priv->wx_mutex);
return ret;
-
}
static int r8192_wx_set_crcmon(struct net_device *dev,
/* Scan capabilities */
__u8 scan_capa;
};
+
static int rtl8180_wx_get_range(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
/* range->max_r_time; */ /* Maximal retry lifetime */
for (i = 0, val = 0; i < 14; i++) {
-
/* Include only legal frequencies for some countries */
if ((GET_DOT11D_INFO(priv->ieee80211)->channel_map)[i+1]) {
range->freq[val].i = i + 1;
return ret;
}
-
static int r8192_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
union iwreq_data *wrqu, char *b)
{
-
int ret;
struct r8192_priv *priv = ieee80211_priv(dev);
return 0;
}
-
static int r8192_wx_get_frag(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
return 0;
}
-
static int r8192_wx_set_wap(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *awrq,
char *extra)
{
-
int ret;
struct r8192_priv *priv = ieee80211_priv(dev);
/* struct sockaddr *temp = (struct sockaddr *)awrq; */
mutex_unlock(&priv->wx_mutex);
return ret;
-
}
static int r8192_wx_get_wap(struct net_device *dev,
mutex_unlock(&priv->wx_mutex);
-
-
/* sometimes, the length is zero while we do not type key value */
if (wrqu->encoding.length != 0) {
-
for (i = 0; i < 4; i++) {
hwkey[i] |= key[4*i+0]&mask;
if (i == 1 && (4*i+1) == wrqu->encoding.length)
zero_addr[key_idx],
0, /* DefaultKey */
hwkey); /* KeyContent */
-
}
else if (wrqu->encoding.length == 0xd) {
zero_addr[key_idx],
0, /* DefaultKey */
hwkey); /* KeyContent */
-
} else {
netdev_warn(dev, "wrong type in WEP, not WEP40 and WEP104\n");
}
-
}
return ret;
}
-
static int r8192_wx_set_scan_type(struct net_device *dev, struct iw_request_info *aa,
union iwreq_data *wrqu, char *p)
{
-
struct r8192_priv *priv = ieee80211_priv(dev);
int *parms = (int *)p;
int mode = parms[0];
return 1;
}
-
-
static int r8192_wx_set_retry(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
struct r8192_priv *priv = ieee80211_priv(dev);
-
wrqu->retry.disabled = 0; /* can't be disabled */
if ((wrqu->retry.flags & IW_RETRY_TYPE) ==
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
-
struct r8192_priv *priv = ieee80211_priv(dev);
short err = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
struct ieee80211_device *ieee = priv->ieee80211;
-
mutex_lock(&priv->wx_mutex);
ret = ieee80211_wx_set_encode_ext(priv->ieee80211, info, wrqu, extra);
memcpy((u8 *)key, ext->key, 16); /* we only get 16 bytes key.why? WB 2008.7.1 */
if ((alg & KEY_TYPE_WEP40) && (ieee->auth_mode != 2)) {
-
setKey(dev,
idx, /* EntryNao */
idx, /* KeyIndex */
0, /* DefaultKey */
key); /* KeyContent */
}
-
-
}
end_hw_sec:
mutex_unlock(&priv->wx_mutex);
return ret;
-
}
+
static int r8192_wx_set_auth(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *data, char *extra)
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
-
int ret = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
ret = ieee80211_wx_set_gen_ie(priv->ieee80211, extra, data->data.length);
mutex_unlock(&priv->wx_mutex);
return ret;
-
-
}
static int dummy(struct net_device *dev, struct iw_request_info *a,
priv->stats.txretrycount += pstx_status->txretry;
priv->stats.txfeedbackretry += pstx_status->txretry;
-
priv->stats.txmulticast += pstx_status->txmcok;
priv->stats.txbroadcast += pstx_status->txbcok;
priv->stats.txunicast += pstx_status->txucok;
if ((buffer_len - frag_offset) > frag_threshold) {
frag_length = frag_threshold;
bLastIniPkt = 0;
-
} else {
frag_length = buffer_len - frag_offset;
bLastIniPkt = 1;
-
}
/* Allocate skb buffer to contain firmware info and tx descriptor info
} while (frag_offset < buffer_len);
return rt_status;
-
}
/*
static bool CPUcheck_firmware_ready(struct net_device *dev)
{
-
bool rt_status = true;
int check_time = 200000;
u32 CPU_status = 0;
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
rt_status = false;
return rt_status;
-
}
bool init_firmware(struct net_device *dev)
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
rt_status = false;
return rt_status;
-
}
MODULE_FIRMWARE("RTL8192U/boot.img");
#define RadioD_ArrayLength 1
#define PHY_REGArrayLength 1
-
extern u32 Rtl8192UsbPHY_REGArray[];
extern u32 Rtl8192UsbPHY_REG_1T2RArray[];
extern u32 Rtl8192UsbRadioA_Array[];
extern u32 Rtl8192UsbMACPHY_Array_PG[];
extern u32 Rtl8192UsbAGCTAB_Array[];
-
-
#endif
void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, u32 bitmask,
u32 data)
{
-
u32 reg, bitshift;
if (bitmask != bMaskDWord) {
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0);
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1);
-
/* TODO: we should not delay such a long time. Ask for help from SD3 */
usleep_range(1000, 1000);
ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack,
bLSSIReadBackData);
-
/* Switch back to Reg_Mode0 */
if (priv->rf_chip == RF_8256) {
priv->RfReg0Value[e_rfpath] &= 0xebf;
offset &= 0x3f;
if (priv->rf_chip == RF_8256) {
-
if (offset >= 31) {
priv->RfReg0Value[e_rfpath] |= 0x140;
rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset,
/* Write operation */
rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
-
if (offset == 0x0)
priv->RfReg0Value[e_rfpath] = data;
u32 reg, bitshift;
struct r8192_priv *priv = ieee80211_priv(dev);
-
if (!rtl8192_phy_CheckIsLegalRFPath(dev, e_rfpath))
return 0;
if (priv->Rf_Mode == RF_OP_By_FW) {
bitshift = ffs(bitmask) - 1;
reg = (reg & bitmask) >> bitshift;
return reg;
-
}
/******************************************************************************
WriteAddr[HW90_BLOCK_RF] = 0x3;
RT_TRACE(COMP_PHY, "%s(), CheckBlock: %d\n", __func__, CheckBlock);
for (i = 0; i < CheckTimes; i++) {
-
/* Write data to register and readback */
switch (CheckBlock) {
case HW90_BLOCK_MAC:
break;
}
-
/* Check whether readback data is correct */
if (reg != WriteData[i]) {
RT_TRACE((COMP_PHY|COMP_ERR),
rtl8192_BB_Config_ParaFile(dev);
}
-
/******************************************************************************
* function: This function obtains the initialization value of Tx power Level
* offset
u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
enum rf90_radio_path_e e_rfpath)
{
-
int i;
switch (e_rfpath) {
case RF90_PATH_A:
for (i = 0; i < RadioA_ArrayLength; i = i+2) {
-
if (Rtl8192UsbRadioA_Array[i] == 0xfe) {
mdelay(100);
continue;
bMask12Bits,
Rtl8192UsbRadioA_Array[i+1]);
mdelay(1);
-
}
break;
case RF90_PATH_B:
for (i = 0; i < RadioB_ArrayLength; i = i+2) {
-
if (Rtl8192UsbRadioB_Array[i] == 0xfe) {
mdelay(100);
continue;
bMask12Bits,
Rtl8192UsbRadioB_Array[i+1]);
mdelay(1);
-
}
break;
case RF90_PATH_C:
for (i = 0; i < RadioC_ArrayLength; i = i+2) {
-
if (Rtl8192UsbRadioC_Array[i] == 0xfe) {
mdelay(100);
continue;
bMask12Bits,
Rtl8192UsbRadioC_Array[i+1]);
mdelay(1);
-
}
break;
case RF90_PATH_D:
for (i = 0; i < RadioD_ArrayLength; i = i+2) {
-
if (Rtl8192UsbRadioD_Array[i] == 0xfe) {
mdelay(100);
continue;
bMask12Bits,
Rtl8192UsbRadioD_Array[i+1]);
mdelay(1);
-
}
break;
default:
}
return 0;
-
}
/******************************************************************************
}
/* FIXME: need to check whether channel is legal or not here */
-
/* <1> Fill up pre common command. */
PreCommonCmdCnt = 0;
rtl8192_phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++,
return true;
}
-
do {
switch (*stage) {
case 0:
*****************************************************************************/
void rtl8192_SwChnl_WorkItem(struct net_device *dev)
{
-
struct r8192_priv *priv = ieee80211_priv(dev);
RT_TRACE(COMP_CH, "==> SwChnlCallback819xUsbWorkItem(), chan:%d\n",
priv->chan);
-
rtl8192_phy_FinishSwChnlNow(dev, priv->chan);
RT_TRACE(COMP_CH, "<== SwChnlCallback819xUsbWorkItem()\n");
*****************************************************************************/
void rtl8192_SetBWModeWorkItem(struct net_device *dev)
{
-
struct r8192_priv *priv = ieee80211_priv(dev);
u8 regBwOpMode;
RT_TRACE(COMP_SWBW, "%s() Switch to %s bandwidth\n", __func__,
priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz");
-
if (priv->rf_chip == RF_PSEUDO_11N) {
priv->SetBWModeInProgress = false;
return;
"SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",
priv->CurrentChannelBW);
break;
-
}
/* Skip over setting of J-mode in BB register here.
* Default value is "None J mode".
priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
rtl8192_SetBWModeWorkItem(dev);
-
}
void InitialGain819xUsb(struct net_device *dev, u8 Operation)
#ifndef _R819XU_PHYREG_H
#define _R819XU_PHYREG_H
-
#define RF_DATA 0x1d4 /* FW will write RF data in the register.*/
/* page8 */
#define rOFDM0_XDTxIQImbalance 0xc98
#define rOFDM0_XDTxAFE 0xc9c
-
/* page d */
#define rOFDM1_LSTF 0xd00
#define rOFDM1_TRxPathEnable 0xd04
#define rTxAGC_Mcs11_Mcs08 0xe18
#define rTxAGC_Mcs15_Mcs12 0xe1c
-
/* RF
* Zebra1
*/