drm/amd/display: Check validation passed after applying pipe split changes
authorDillon Varone <Dillon.Varone@amd.com>
Wed, 19 Oct 2022 22:42:49 +0000 (18:42 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 1 Nov 2022 15:47:13 +0000 (11:47 -0400)
[WHY?]
Validation can fail for configurations that were previously supported, by only
changing parameters such as the DET allocations, which is currently unexpected.

[HOW?]
Add a check that validation passes after applying pipe split related changes.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

index b6cd10f..9c03f62 100644 (file)
@@ -1736,10 +1736,12 @@ bool dcn32_internal_validate_bw(struct dc *dc,
                 * ensure all the params are calculated correctly. We do not need to run the
                 * pipe split check again after this call (pipes are already split / merged).
                 * */
-               if (!fast_validate) {
-                       context->bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final =
-                                               dm_prefetch_support_uclk_fclk_and_stutter_if_possible;
-                       vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
+               context->bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final =
+                                       dm_prefetch_support_uclk_fclk_and_stutter_if_possible;
+               vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
+               if (vlevel == context->bw_ctx.dml.soc.num_states) {
+                       /* failed after DET size changes */
+                       goto validate_fail;
                }
        }
        *vlevel_out = vlevel;