writel(0x000310f4 | MCTL_CR_PAGE_SIZE(page_size),
&mctl_com->cr);
setbits_le32(&mctl_com->swonr, 0x0003ffff);
- mctl_mem_fill();
for (rows = 11; rows < 16; rows++) {
offset = 1 << (rows + columns + bus);
if (mctl_mem_matches(offset))
#include <asm/arch/dram_sun4i.h>
#endif
-#define MCTL_MEM_FILL_MATCH_COUNT 64
-
unsigned long sunxi_dram_init(void);
/*
}
/*
- * Fill beginning of DRAM with "random" data for mctl_mem_matches()
- */
-static inline void mctl_mem_fill(void)
-{
- int i;
-
- for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++)
- writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
-}
-
-/*
* Test if memory at offset offset matches memory at begin of DRAM
*/
static inline bool mctl_mem_matches(u32 offset)
{
- return memcmp((u32 *)CONFIG_SYS_SDRAM_BASE,
- (u32 *)(CONFIG_SYS_SDRAM_BASE + offset),
- MCTL_MEM_FILL_MATCH_COUNT * 4) == 0;
+ /* Try to write different values to RAM at two addresses */
+ writel(0, CONFIG_SYS_SDRAM_BASE);
+ writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset);
+ /* Check if the same value is actually observed when reading back */
+ return readl(CONFIG_SYS_SDRAM_BASE) ==
+ readl(CONFIG_SYS_SDRAM_BASE + offset);
}
#endif /* _SUNXI_DRAM_H */