storage: add sd node on tl1 ref dtsi [1/1]

PD#SWPL-5552

Problem:
Some project of tl ref need sd function

Solution:
Add sd node on tl1 ref dtsi which could instead sdio node if necessary

Verify:
tl1 ref

Change-Id: I1aca71624934fd4bcd97f8b1eb3f95f9a3dbdcf8
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>

diff --git a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts b/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
index a766f90..d6bff98 100644 (file)
--- a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
+++ b/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
@@ -1262,6 +1262,50 @@
                         */
                };
        };
+
+/*     sd_emmc_b: sd@ffe05000 {
+ *             status = "okay";
+ *             compatible = "amlogic, meson-mmc-tl1";
+ *             reg = <0xffe05000 0x800>;
+ *             interrupts = <0 190 1>;
+ *
+ *             pinctrl-names = "sd_all_pins",
+ *                     "sd_clk_cmd_pins",
+ *                     "sd_1bit_pins";
+ *             pinctrl-0 = <&sd_all_pins>;
+ *             pinctrl-1 = <&sd_clk_cmd_pins>;
+ *             pinctrl-2 = <&sd_1bit_pins>;
+ *
+ *             clocks = <&clkc CLKID_SD_EMMC_B>,
+ *                     <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ *                     <&clkc CLKID_FCLK_DIV2>,
+ *                     <&clkc CLKID_FCLK_DIV5>,
+ *                     <&xtal>;
+ *             clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ *             bus-width = <4>;
+ *             cap-sd-highspeed;
+ *             cap-mmc-highspeed;
+ *             max-frequency = <100000000>;
+ *             disable-wp;
+ *             sd {
+ *                     pinname = "sd";
+ *                     ocr_avail = <0x200080>;
+ *                     caps = "MMC_CAP_4_BIT_DATA",
+ *                             "MMC_CAP_MMC_HIGHSPEED",
+ *                             "MMC_CAP_SD_HIGHSPEED";
+ *                     f_min = <400000>;
+ *                     f_max = <200000000>;
+ *                     max_req_size = <0x20000>;
+ *                     no_sduart = <1>;
+ *                     gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ *                     jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ *                     gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ *                     card_type = <5>;
+ *             };
+ *     };
+ */
+
 }; /* end of / */
 
 &i2c0 {

diff --git a/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts b/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
index 7604d6c..755e6a6 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
+++ b/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
@@ -1257,6 +1257,49 @@
                         */
                };
        };
+/*     sd_emmc_b: sd@ffe05000 {
+ *             status = "okay";
+ *             compatible = "amlogic, meson-mmc-tl1";
+ *             reg = <0xffe05000 0x800>;
+ *             interrupts = <0 190 1>;
+ *
+ *             pinctrl-names = "sd_all_pins",
+ *                     "sd_clk_cmd_pins",
+ *                     "sd_1bit_pins";
+ *             pinctrl-0 = <&sd_all_pins>;
+ *             pinctrl-1 = <&sd_clk_cmd_pins>;
+ *             pinctrl-2 = <&sd_1bit_pins>;
+ *
+ *             clocks = <&clkc CLKID_SD_EMMC_B>,
+ *                     <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ *                     <&clkc CLKID_FCLK_DIV2>,
+ *                     <&clkc CLKID_FCLK_DIV5>,
+ *                     <&xtal>;
+ *             clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ *             bus-width = <4>;
+ *             cap-sd-highspeed;
+ *             cap-mmc-highspeed;
+ *             max-frequency = <100000000>;
+ *             disable-wp;
+ *             sd {
+ *                     pinname = "sd";
+ *                     ocr_avail = <0x200080>;
+ *                     caps = "MMC_CAP_4_BIT_DATA",
+ *                             "MMC_CAP_MMC_HIGHSPEED",
+ *                             "MMC_CAP_SD_HIGHSPEED";
+ *                     f_min = <400000>;
+ *                     f_max = <200000000>;
+ *                     max_req_size = <0x20000>;
+ *                     no_sduart = <1>;
+ *                     gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ *                     jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ *                     gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ *                     card_type = <5>;
+ *             };
+ *     };
+ */
+
 }; /* end of / */
 
 &i2c0 {