Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' and ...

 - Use clk_hw pointers in socfpga driver
 - Cleanup parent data in qcom clk drivers

* clk-cleanup:
  clk: Drop double "if" in clk_core_determine_round_nolock() comment
  clk: at91: Trivial typo fixes in the file sama7g5.c
  clk: use clk_core_enable_lock() a bit more

* clk-renesas:
  clk: renesas: Zero init clk_init_data
  clk: renesas: Couple of spelling fixes
  clk: renesas: r8a779a0: Add CMT clocks
  clk: renesas: r8a7795: Add TMU clocks
  clk: renesas: r8a779a0: Add TSC clock
  clk: renesas: r8a779a0: Add TMU clocks
  clk: renesas: r8a77965: Add DAB clock
  clk: renesas: r8a77990: Add DAB clock

* clk-socfpga:
  clk: socfpga: remove redundant initialization of variable div
  clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
  clk: socfpga: Fix code formatting
  clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
  clk: socfpga: arria10: convert to use clk_hw
  clk: socfpga: use clk_hw_register for a5/c5

* clk-allwinner:
  clk: sunxi: Demote non-conformant kernel-doc headers
  clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

* clk-qcom: (45 commits)
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: videocc-sm8250: use parent_hws where possible
  clk: qcom: videocc-sm8150: use parent_hws where possible
  clk: qcom: gpucc-sm8250: use parent_hws where possible
  clk: qcom: gpucc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sm8350: use parent_hws where possible
  clk: qcom: gcc-sm8250: use parent_hws where possible
  clk: qcom: gcc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sdx55: use parent_hws where possible
  ...

diff --combined drivers/clk/socfpga/clk-gate.c
index 43ecd50,43ecd50,b17aba5,43ecd50,cf94a12..1ec9678
--- 1/drivers/clk/socfpga/clk-gate.c
--- 2/drivers/clk/socfpga/clk-gate.c
--- 3/drivers/clk/socfpga/clk-gate.c
--- 4/drivers/clk/socfpga/clk-gate.c
--- 5/drivers/clk/socfpga/clk-gate.c
+++ b/drivers/clk/socfpga/clk-gate.c
@@@@@@ -99,7 -99,7 -99,7 -99,7 -99,7 +99,7 @@@@@@ static unsigned long socfpga_clk_recalc
                val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
                val &= GENMASK(socfpgaclk->width - 1, 0);
                /* Check for GPIO_DB_CLK by its offset */
----            if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
++++            if ((uintptr_t) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
                        div = val + 1;
                else
                        div = (1 << val);
@@@@@@ -174,13 -174,13 -174,14 -174,13 -174,13 +174,14 @@@@@@ void __init socfpga_gate_init(struct de
        u32 div_reg[3];
        u32 clk_phase[2];
        u32 fixed_div;
-- --   struct clk *clk;
++ ++   struct clk_hw *hw_clk;
        struct socfpga_gate_clk *socfpga_clk;
        const char *clk_name = node->name;
        const char *parent_name[SOCFPGA_MAX_PARENTS];
        struct clk_init_data init;
        struct clk_ops *ops;
        int rc;
++ ++   int err;
     
        socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL);
        if (WARN_ON(!socfpga_clk))
@@@@@@ -238,12 -238,12 -239,14 -238,12 -238,12 +239,14 @@@@@@
        init.parent_names = parent_name;
        socfpga_clk->hw.hw.init = &init;
     
-- --   clk = clk_register(NULL, &socfpga_clk->hw.hw);
-- --   if (WARN_ON(IS_ERR(clk))) {
++ ++   hw_clk = &socfpga_clk->hw.hw;
++ ++
++ ++   err = clk_hw_register(NULL, hw_clk);
++ ++   if (err) {
                kfree(socfpga_clk);
                return;
        }
-- --   rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
++ ++   rc = of_clk_add_provider(node, of_clk_src_simple_get, hw_clk);
        if (WARN_ON(rc))
                return;
     }