DRM: armada: fix corruption while loading cursors
authorRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 7 Apr 2014 11:00:17 +0000 (12:00 +0100)
committerDave Airlie <airlied@redhat.com>
Tue, 8 Apr 2014 00:51:03 +0000 (10:51 +1000)
Loading cursors to the LCD controller's SRAM can be corrupted when the
configured pixel clock is relatively slow.  This seems to be caused
when we write back-to-back to the SRAM registers.

There doesn't appear to be any status register we can read to check
when an access has completed.

Inserting a dummy read between the writes appears to fix the problem.

Cc: <stable@vger.kernel.org> # 3.13
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/armada/armada_crtc.c

index 5831e41..81c34f9 100644 (file)
@@ -679,6 +679,7 @@ static void armada_load_cursor_argb(void __iomem *base, uint32_t *pix,
                                       base + LCD_SPU_SRAM_WRDAT);
                        writel_relaxed(addr | SRAM_WRITE,
                                       base + LCD_SPU_SRAM_CTRL);
+                       readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN);
                        addr += 1;
                        if ((addr & 0x00ff) == 0)
                                addr += 0xf00;