arm64/sme: Automatically generate SMIDR_EL1 defines

Automatically generate the defines for SMIDR_EL1, no functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220510161208.631259-9-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index cbf03a1..ce08a42 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -463,7 +463,6 @@
 #define SYS_CCSIDR_EL1                 sys_reg(3, 1, 0, 0, 0)
 #define SYS_CLIDR_EL1                  sys_reg(3, 1, 0, 0, 1)
 #define SYS_GMID_EL1                   sys_reg(3, 1, 0, 0, 4)
-#define SYS_SMIDR_EL1                  sys_reg(3, 1, 0, 0, 6)
 #define SYS_AIDR_EL1                   sys_reg(3, 1, 0, 0, 7)
 
 #define SMIDR_EL1_IMPLEMENTER_SHIFT    24

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index d0ac576..1bf88ca 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -197,6 +197,15 @@ Sysreg     SMCR_EL1        3       0       1       2       6
 Fields SMCR_ELx
 EndSysreg
 
+Sysreg SMIDR_EL1       3       1       0       0       6
+Res0   63:32
+Field  31:24   IMPLEMENTER
+Field  23:16   REVISION
+Field  15      SMPS
+Res0   14:12
+Field  11:0    AFFINITY
+EndSysreg
+
 Sysreg SMCR_EL2        3       4       1       2       6
 Fields SMCR_ELx
 EndSysreg