};
};
- vout {
- compatible = "amlogic, vout";
- dev_name = "vout";
- status = "okay";
- };
-
- vout2 {
- compatible = "amlogic, vout2";
- dev_name = "vout";
- status = "okay";
- };
-
- amhdmitx: amhdmitx{
- compatible = "amlogic, amhdmitx";
- dev_name = "amhdmitx";
- status = "okay";
- vend-data = <&vend_data>;
- pinctrl-names="default", "hdmitx_i2c";
- pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
- pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "hdmi_vapb_clk",
- "hdmi_vpu_clk";
- /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
- interrupts = <0 57 1>;
- interrupt-names = "hdmitx_hpd";
- /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
- * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
- * 10:G12A
- */
- ic_type = <10>;
- vend_data: vend_data{ /* Should modified by Customer */
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* standards.ieee.org/develop/regauth/oui/oui.txt */
- vendor_id = <0x000000>;
- };
- };
-
- vdac {
- compatible = "amlogic, vdac";
- dev_name = "vdac";
- status = "okay";
- };
-
cvbsout {
compatible = "amlogic, cvbsout-g12a";
dev_name = "cvbsout";
0xffff 0x0>; /* ending flag */
};
- sd_emmc_b:sd@ffe05000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe05000 0x0 0x2000>;
- interrupts = <0 190 1>;
-
- pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
- pinctrl-0 = <&sd_clk_cmd_pins>;
- pinctrl-1 = <&sd_all_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>;
- clock-names = "core", "clkin0", "clkin1", "clkin2";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- non-removable;
- disable-wp;
- sd {
- pinname = "sd";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_4_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_NONREMOVABLE",
- "MMC_CAP_UHS_SDR12",
- "MMC_CAP_UHS_SDR25",
- "MMC_CAP_UHS_SDR50",
- "MMC_PM_KEEP_POWER",
- "MMC_CAP_NONREMOVABLE"; /**ptm debug */
- f_min = <400000>;
- f_max = <200000000>;
- max_req_size = <0x20000>; /**128KB*/
- card_type = <5>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- };
- };
-
- aocec: aocec {
- compatible = "amlogic, aocec-g12a";
- device_name = "aocec";
- status = "okay";
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* Refer to the following URL at:
- * http://standards.ieee.org/develop/regauth/oui/oui.txt
- */
- vendor_id = <0x000000>;
- product_desc = "G12A"; /* Max Chars: 16 */
- cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
- port_num = <1>;
- ee_cec;
- arc_port_mask = <0x2>;
- interrupts = <0 203 1>;
- interrupt-names = "hdmi_aocecb";
- pinctrl-names = "default";
- pinctrl-0=<&eecec_b>;
- reg = <0x0 0xFF80023c 0x0 0x4
- 0x0 0xFF800000 0x0 0x400>;
- };
-
- canvas{
- compatible = "amlogic, meson, canvas";
- dev_name = "amlogic-canvas";
- status = "okay";
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
-
- codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_cbus_base{
- reg = <0x0 0xffd00000 0x0 0x100000>;
- };
- io_dos_base{
- reg = <0x0 0xff620000 0x0 0x10000>;
- };
- io_hiubus_base{
- reg = <0x0 0xff63c000 0x0 0x2000>;
- };
- io_aobus_base{
- reg = <0x0 0xff800000 0x0 0x10000>;
- };
- io_vcbus_base{
- reg = <0x0 0xff900000 0x0 0x40000>;
- };
- io_dmc_base{
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
- };
-
codec_mm {
compatible = "amlogic, codec, mm";
memory-region = <&codec_mm_cma &codec_mm_reserved>;
status = "okay";
};
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- dev_name = "mesonstream";
- status = "okay";
- clocks = <&clkc CLKID_DOS_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_DOS
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX
- &clkc CLKID_HEVCF_MUX>;
- clock-names = "parser_top",
- "demux",
- "vdec",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux",
- "clk_hevcb_mux";
- };
-
- vdec {
- compatible = "amlogic, vdec";
- dev_name = "vdec.0";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- rdma{
- compatible = "amlogic, meson, rdma";
- dev_name = "amlogic-rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- ge2d {
- compatible = "amlogic, ge2d-g12a";
- dev_name = "ge2d";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0x0 0xff940000 0x0 0x10000>;
- };
-
- amvenc_avc{
- compatible = "amlogic, amvenc_avc";
- dev_name = "amvenc_avc";
- status = "okay";
- interrupts = <0 45 1>;
- interrupt-names = "mailbox_2";
- };
-
- hevc_enc{
- compatible = "cnm, HevcEnc";
- //memory-region = <&hevc_enc_reserved>;
- dev_name = "HevcEnc";
- status = "okay";
- interrupts = <0 187 1>;
- interrupt-names = "wave420l_irq";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_reg_base{
- reg = <0x0 0xff610000 0x0 0x4000>;
- };
- };
-
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
nrds-enable = <1>;
pps-enable = <1>;
};
- /*if you want to use vdin just modify status to "ok"*/
- vdin0 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin0_cma_reserved>;
- dev_name = "vdin0";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
- /*MByte, if 10bit disable: 64M(YUV422),
- *if 10bit enable: 64*1.5 = 96M(YUV422)
- *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
- *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
- *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
- *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
- */
- /*cma_size = <16>;*/
- interrupts = <0 83 1>;
- rdma-irq = <2>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <0>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- *bit4:support yuv422 10bit full pack mode (from txl new add)
- */
- tv_bit_mode = <0x15>;
- };
- vdin1 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin1_cma_reserved>;
- dev_name = "vdin1";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
- interrupts = <0 85 1>;
- rdma-irq = <4>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <1>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- */
- tv_bit_mode = <1>;
- };
amlvecm {
compatible = "amlogic, vecm";
cm_en = <0>;/*1:enabel ;0:disable*/
};
- meson-amvideom {
- compatible = "amlogic, amvideom";
- dev_name = "amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
+
meson-fb {
compatible = "amlogic, meson-g12a";
};
/* Audio Related start */
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- pdm_bus {
- reg = <0x0 0xFF640000 0x0 0x2000>;
- };
- audiobus_base {
- reg = <0x0 0xFF642000 0x0 0x2000>;
- };
- audiolocker_base {
- reg = <0x0 0xFF64A000 0x0 0x2000>;
- };
- eqdrc_base {
- reg = <0x0 0xFF642800 0x0 0x1800>;
- };
- reset_base {
- reg = <0x0 0xFFD01000 0x0 0x1000>;
- };
- };
+
pdm_codec:dummy{
#sound-dai-cells = <0>;
compatible = "amlogic, pdm_dummy_codec";
status = "okay";
};
- vddcpu0: pwmao_d-regulator {
- compatible = "pwm-regulator";
- pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>;
- regulator-name = "vddcpu0";
- regulator-min-microvolt = <731000>;
- regulator-max-microvolt = <1011000>;
- regulator-always-on;
- max-duty-cycle = <1210>;
- /* Voltage Duty-Cycle */
- voltage-table = <1011000 0>,
- <1001000 6>,
- <991000 9>,
- <981000 12>,
- <971000 16>,
- <961000 19>,
- <951000 23>,
- <941000 26>,
- <931000 29>,
- <921000 33>,
- <911000 36>,
- <901000 39>,
- <891000 43>,
- <881000 46>,
- <871000 50>,
- <861000 53>,
- <851000 56>,
- <841000 60>,
- <831000 63>,
- <821000 67>,
- <811000 70>,
- <801000 73>,
- <791000 77>,
- <781000 80>,
- <771000 84>,
- <761000 87>,
- <751000 90>,
- <741000 94>,
- <731000 100>;
- status = "okay";
- };
+
}; /* end of / */
&pwm_AO_cd {
/* Audio Related End */
&aobus{
- uart_AO: serial@3000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <1>;
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_uart_pins>;
- support-sysrq = <0>; /* 0 not support , 1 support */
+
+};
+
+&irblaster {
+ status = "disabled";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+&sd_emmc_b {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_NONREMOVABLE"; /**ptm debug */
+ f_min = <400000>;
+ f_max = <200000000>;
};
};
+
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
};
-
secos_reserved:linux,secos {
status = "disable";
compatible = "amlogic, aml_secos_memory";
};
};
- meson-irblaster {
- compatible = "amlogic, meson_irblaster";
- dev_name = "meson-irblaster";
- reg = <0x0 0xff80014c 0x0 0x10>,
- <0x0 0xff800040 0x0 0x4>;
- pinctrl-names = "default";
- pinctrl-0 = <&irblaster_pins>;
- status = "okay";
- };
-
- vout {
- compatible = "amlogic, vout";
- dev_name = "vout";
- status = "okay";
- };
-
- vout2 {
- compatible = "amlogic, vout2";
- dev_name = "vout";
- status = "okay";
- };
-
- amhdmitx: amhdmitx{
- compatible = "amlogic, amhdmitx";
- dev_name = "amhdmitx";
- status = "okay";
- vend-data = <&vend_data>;
- pinctrl-names="default", "hdmitx_i2c";
- pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
- pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "hdmi_vapb_clk",
- "hdmi_vpu_clk";
- /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
- interrupts = <0 57 1>;
- interrupt-names = "hdmitx_hpd";
- /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
- * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
- * 10:G12A
- */
- ic_type = <10>;
- vend_data: vend_data{ /* Should modified by Customer */
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* standards.ieee.org/develop/regauth/oui/oui.txt */
- vendor_id = <0x000000>;
- };
- };
-
- vdac {
- compatible = "amlogic, vdac";
- dev_name = "vdac";
- status = "okay";
- };
-
cvbsout {
compatible = "amlogic, cvbsout-g12a";
dev_name = "cvbsout";
status = "okay";
-
/* performance: reg_address, reg_value */
/* s905x */
performance = <0x1bf0 0x9
};
};
- pcie_A: pcieA@fc000000 {
- compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
- reg = <0x0 0xfc000000 0x0 0x400000
- 0x0 0xff648000 0x0 0x2000
- 0x0 0xfc400000 0x0 0x200000
- 0x0 0xff646000 0x0 0x2000
- 0x0 0xffd01080 0x0 0x10>;
- reg-names = "elbi", "cfg", "config", "phy", "reset";
- reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
- interrupts = <0 221 0>, <0 223 0>;
- #interrupt-cells = <1>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
- /* downstream I/O */
- 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
- /* non-prefetchable memory */
- num-lanes = <1>;
- pcie-num = <1>;
-
- clocks = <&clkc CLKID_PCIE_PLL
- &clkc CLKID_PCIE_COMB
- &clkc CLKID_PCIE_PHY>;
- clock-names = "pcie_refpll",
- "pcie",
- "pcie_phy";
- /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
- gpio-type = <2>;
- pcie-apb-rst-bit = <15>;
- pcie-phy-rst-bit = <14>;
- pcie-ctrl-a-rst-bit = <12>;
- status = "okay";
- };
-
- sd_emmc_c: emmc@ffe07000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe07000 0x0 0x800>;
- interrupts = <0 191 1>;
- pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
- pinctrl-0 = <&emmc_clk_cmd_pins>;
- pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <8>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- /* mmc-ddr-1_8v; */
- /* mmc-hs200-1_8v; */
-
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- emmc {
- pinname = "emmc";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_8_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_NONREMOVABLE",
- /* "MMC_CAP_1_8V_DDR", */
- "MMC_CAP_HW_RESET",
- "MMC_CAP_ERASE",
- "MMC_CAP_CMD23";
- /* caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
- f_min = <400000>;
- f_max = <200000000>;
- tx_delay = <0>;
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
- hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
- card_type = <1>;
- /* 1:mmc card(include eMMC),
- * 2:sd card(include tSD)
- */
- };
- };
-
- sd_emmc_b:sd@ffe05000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe05000 0x0 0x800>;
- interrupts = <0 190 1>;
-
- pinctrl-names = "sd_all_pins",
- "sd_clk_cmd_pins";
- pinctrl-0 = <&sd_all_pins>;
- pinctrl-1 = <&sd_clk_cmd_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- sd {
- pinname = "sd";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_4_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_UHS_SDR12",
- "MMC_CAP_UHS_SDR25",
- "MMC_CAP_UHS_SDR50";
- f_min = <400000>;
- f_max = <200000000>;
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
- jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
- gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
- card_type = <5>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- };
- };
- sd_emmc_a:sdio@ffe03000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe03000 0x0 0x800>;
- interrupts = <0 189 4>;
-
- pinctrl-names = "sdio_all_pins",
- "sdio_clk_cmd_pins";
- pinctrl-0 = <&sdio_all_pins>;
- pinctrl-1 = <&sdio_clk_cmd_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- sdio {
- pinname = "sdio";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_4_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_NONREMOVABLE",
- "MMC_CAP_UHS_SDR12",
- "MMC_CAP_UHS_SDR25",
- "MMC_CAP_UHS_SDR50",
- "MMC_CAP_UHS_SDR104",
- "MMC_PM_KEEP_POWER",
- "MMC_CAP_SDIO_IRQ";
- f_min = <400000>;
- f_max = <200000000>;
- /* max_req_size = <0x20000>; */ /**128KB*/
- max_req_size = <0x400>;
- card_type = <3>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- dmode = "pio";
- };
- };
- nand: nfc@0 {
- compatible = "amlogic, aml_mtd_nand";
- dev_name = "mtdnand";
- status = "disabled";
- reg = <0x0 0xFFE07800 0x0 0x200>;
- interrupts = <0 34 1>;
-
- pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
- pinctrl-0 = <&all_nand_pins>;
- pinctrl-1 = <&all_nand_pins>;
- pinctrl-2 = <&nand_cs_pins>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>;
- clock-names = "core", "clkin";
-
- device_id = <0>;
- /*fip/tpl configurations, must be same
- * with uboot if bl_mode was set as 1
- * bl_mode: 0 compact mode; 1 descrete mode
- * if bl_mode was set as 1, fip configuration will work
- */
- bl_mode = <1>;
- /*copy count of fip*/
- fip_copies = <4>;
- /*size of each fip copy */
- fip_size = <0x200000>;
- nand_clk_ctrl = <0xFFE07000>;
- plat-names = "bootloader","nandnormal";
- plat-num = <2>;
- plat-part-0 = <&bootloader>;
- plat-part-1 = <&nandnormal>;
- bootloader: bootloader{
- enable_pad ="ce0";
- busy_pad = "rb0";
- timming_mode = "mode5";
- bch_mode = "bch8_1k";
- t_rea = <20>;
- t_rhoh = <15>;
- chip_num = <1>;
- part_num = <0>;
- rb_detect = <1>;
- };
- nandnormal: nandnormal{
- enable_pad ="ce0";
- busy_pad = "rb0";
- timming_mode = "mode5";
- bch_mode = "bch8_1k";
- plane_mode = "twoplane";
- t_rea = <20>;
- t_rhoh = <15>;
- chip_num = <2>;
- part_num = <3>;
- partition = <&nand_partitions>;
- rb_detect = <1>;
- };
- nand_partitions:nand_partition{
- /*
- * if bl_mode is 1, tpl size was generate by
- * fip_copies * fip_size which
- * will not skip bad when calculating
- * the partition size;
- *
- * if bl_mode is 0,
- * tpl partition must be comment out.
- */
- tpl{
- offset=<0x0 0x0>;
- size=<0x0 0x0>;
- };
- logo{
- offset=<0x0 0x0>;
- size=<0x0 0x200000>;
- };
- recovery{
- offset=<0x0 0x0>;
- size=<0x0 0x1000000>;
- };
- boot{
- offset=<0x0 0x0>;
- size=<0x0 0x1000000>;
- };
- system{
- offset=<0x0 0x0>;
- size=<0x0 0x4000000>;
- };
- data{
- offset=<0xffffffff 0xffffffff>;
- size=<0x0 0x0>;
- };
- };
- };
-
- uart_A: serial@ffd24000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd24000 0x0 0x18>;
- interrupts = <0 26 1>;
- status = "okay";
- clocks = <&xtal
- &clkc CLKID_UART0>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 128 >;
- pinctrl-names = "default";
- pinctrl-0 = <&a_uart_pins>;
- };
-
- uart_B: serial@ffd23000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd23000 0x0 0x18>;
- interrupts = <0 75 1>;
- status = "disable";
- clocks = <&xtal
- &clkc CLKID_UART1>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&b_uart_pins>;
- };
-
- uart_C: serial@ffd22000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd22000 0x0 0x18>;
- interrupts = <0 93 1>;
- status = "disable";
- clocks = <&xtal
- &clkc CLKID_UART1>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&c_uart_pins>;
- };
-
- aocec: aocec {
- compatible = "amlogic, aocec-g12a";
- device_name = "aocec";
- status = "okay";
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* Refer to the following URL at:
- * http://standards.ieee.org/develop/regauth/oui/oui.txt
- */
- vendor_id = <0x000000>;
- product_desc = "G12A"; /* Max Chars: 16 */
- cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
- port_num = <1>;
- ee_cec;
- arc_port_mask = <0x2>;
- interrupts = <0 203 1>;
- interrupt-names = "hdmi_aocecb";
- pinctrl-names = "default";
- pinctrl-0=<&eecec_b>;
- reg = <0x0 0xFF80023c 0x0 0x4
- 0x0 0xFF800000 0x0 0x400>;
- };
-
- canvas{
- compatible = "amlogic, meson, canvas";
- dev_name = "amlogic-canvas";
- status = "okay";
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
-
- codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_cbus_base{
- reg = <0x0 0xffd00000 0x0 0x100000>;
- };
- io_dos_base{
- reg = <0x0 0xff620000 0x0 0x10000>;
- };
- io_hiubus_base{
- reg = <0x0 0xff63c000 0x0 0x2000>;
- };
- io_aobus_base{
- reg = <0x0 0xff800000 0x0 0x10000>;
- };
- io_vcbus_base{
- reg = <0x0 0xff900000 0x0 0x40000>;
- };
- io_dmc_base{
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
- io_efuse_base{
- reg = <0x0 0xff630000 0x0 0x2000>;
- };
- };
-
codec_mm {
compatible = "amlogic, codec, mm";
memory-region = <&codec_mm_cma &codec_mm_reserved>;
status = "okay";
};
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- dev_name = "mesonstream";
- status = "okay";
- clocks = <&clkc CLKID_DOS_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_DOS
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX
- &clkc CLKID_HEVCF_MUX>;
- clock-names = "parser_top",
- "demux",
- "vdec",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux",
- "clk_hevcb_mux";
- };
-
- vdec {
- compatible = "amlogic, vdec";
- dev_name = "vdec.0";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- rdma{
- compatible = "amlogic, meson, rdma";
- dev_name = "amlogic-rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- ge2d {
- compatible = "amlogic, ge2d-g12a";
- dev_name = "ge2d";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0x0 0xff940000 0x0 0x10000>;
- };
-
ppmgr {
compatible = "amlogic, ppmgr";
memory-region = <&ppmgr_reserved>;
dev_name = "ppmgr";
status = "okay";
};
- amvenc_avc{
- compatible = "amlogic, amvenc_avc";
- dev_name = "amvenc_avc";
- status = "okay";
- interrupts = <0 45 1>;
- interrupt-names = "mailbox_2";
- };
-
- hevc_enc{
- compatible = "cnm, HevcEnc";
- //memory-region = <&hevc_enc_reserved>;
- dev_name = "HevcEnc";
- status = "okay";
- interrupts = <0 187 1>;
- interrupt-names = "wave420l_irq";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_reg_base{
- reg = <0x0 0xff610000 0x0 0x4000>;
- };
- };
deinterlace {
compatible = "amlogic, deinterlace";
dev_name = "ionvideo";
status = "okay";
};
- /*if you want to use vdin just modify status to "ok"*/
- vdin0 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin0_cma_reserved>;
- dev_name = "vdin0";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
- /*MByte, if 10bit disable: 64M(YUV422),
- *if 10bit enable: 64*1.5 = 96M(YUV422)
- *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
- *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
- *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
- *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
- */
- /*cma_size = <16>;*/
- interrupts = <0 83 1>;
- rdma-irq = <2>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <0>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- *bit4:support yuv422 10bit full pack mode (from txl new add)
- */
- tv_bit_mode = <0x15>;
- };
- vdin1 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin1_cma_reserved>;
- dev_name = "vdin1";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
- interrupts = <0 85 1>;
- rdma-irq = <4>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <1>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- */
- tv_bit_mode = <1>;
- };
unifykey{
compatible = "amlogic, unifykey";
status = "ok";
-
unifykey-num = <14>;
unifykey-index-0 = <&keysn_0>;
unifykey-index-1 = <&keysn_1>;
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
};
+
amdolby_vision {
compatible = "amlogic, aml_amdolby_vision_driver";
dev_name = "aml_amdolby_vision_driver";
status = "okay";
};
- meson-amvideom {
- compatible = "amlogic, amvideom";
- dev_name = "amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
meson-fb {
compatible = "amlogic, meson-g12a";
};
/* Audio Related start */
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- pdm_bus {
- reg = <0x0 0xFF640000 0x0 0x2000>;
- };
- audiobus_base {
- reg = <0x0 0xFF642000 0x0 0x2000>;
- };
- audiolocker_base {
- reg = <0x0 0xFF64A000 0x0 0x2000>;
- };
- eqdrc_base {
- reg = <0x0 0xFF642800 0x0 0x1800>;
- };
- reset_base {
- reg = <0x0 0xFFD01000 0x0 0x1000>;
- };
- };
pdm_codec:dummy{
#sound-dai-cells = <0>;
compatible = "amlogic, pdm_dummy_codec";
aml-audio-card,name = "AML-AUGESOUND";
aml-audio-card,loopback = <&aml_loopback>;
-
aml-audio-card,aux-devs = <&amlogic_codec>;
/*avout mute gpio*/
avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
-
/*for audio effect ,eqdrc */
aml-audio-card,effect = <&audio_effect>;
suffix-name = "alsaPORT-i2s";
cpu {
sound-dai = <&aml_tdmb>;
-
dai-tdm-slot-tx-mask = <1 1>;
dai-tdm-slot-rx-mask = <1 1>;
dai-tdm-slot-num = <2>;
-
-/*
- * dai-tdm-slot-tx-mask =
- * <1 1 1 1 1 1 1 1>;
- * dai-tdm-slot-rx-mask =
- * <1 1 1 1 1 1 1 1>;
- * dai-tdm-slot-num = <8>;
- */
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
dai-tdm-slot-width = <32>;
system-clock-frequency = <12288000>;
};
status = "okay";
};
- vddcpu0: pwmao_d-regulator {
- compatible = "pwm-regulator";
- pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>;
- regulator-name = "vddcpu0";
- regulator-min-microvolt = <731000>;
- regulator-max-microvolt = <1011000>;
- regulator-always-on;
- max-duty-cycle = <1210>;
- /* Voltage Duty-Cycle */
- voltage-table = <1011000 0>,
- <1001000 6>,
- <991000 9>,
- <981000 12>,
- <971000 16>,
- <961000 19>,
- <951000 23>,
- <941000 26>,
- <931000 29>,
- <921000 33>,
- <911000 36>,
- <901000 39>,
- <891000 43>,
- <881000 46>,
- <871000 50>,
- <861000 53>,
- <851000 56>,
- <841000 60>,
- <831000 63>,
- <821000 67>,
- <811000 70>,
- <801000 73>,
- <791000 77>,
- <781000 80>,
- <771000 84>,
- <761000 87>,
- <751000 90>,
- <741000 94>,
- <731000 100>;
-
- status = "okay";
- };
-
- meson_cooldev: meson-cooldev@0 {
- status = "okay";
- compatible = "amlogic, meson-cooldev";
- device_name = "mcooldev";
- cooling_devices {
- cpufreq_cool_cluster0 {
- min_state = <1000000>;
- dyn_coeff = <140>;
- cluster_id = <0>;
- node_name = "cpufreq_cool0";
- device_type = "cpufreq";
- };
- cpucore_cool_cluster0 {
- min_state = <1>;
- dyn_coeff = <0>;
- cluster_id = <0>;
- node_name = "cpucore_cool0";
- device_type = "cpucore";
- };
- };
- cpufreq_cool0:cpufreq_cool0 {
- #cooling-cells = <2>; /* min followed by max */
- };
- cpucore_cool0:cpucore_cool0 {
- #cooling-cells = <2>; /* min followed by max */
- };
- };
- /*meson cooling devices end*/
-
- thermal-zones {
- soc_thermal: soc_thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- sustainable-power = <2150>;
- thermal-sensors = <&p_tsensor 0>;
- trips {
- pswitch_on: trip-point@0 {
- temperature = <60000>;
- hysteresis = <5000>;
- type = "passive";
- };
- pcontrol: trip-point@1 {
- temperature = <75000>;
- hysteresis = <5000>;
- type = "passive";
- };
- phot: trip-point@2 {
- temperature = <85000>;
- hysteresis = <5000>;
- type = "hot";
- };
- pcritical: trip-point@3 {
- temperature = <150000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- cpufreq_cooling_map {
- trip = <&pcontrol>;
- cooling-device = <&cpufreq_cool0 0 4>;
- contribution = <1024>;
- };
- cpucore_cooling_map {
- trip = <&pcontrol>;
- cooling-device = <&cpucore_cool0 0 3>;
- contribution = <1024>;
- };
- };
- };
- ddr_thermal: ddr_thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- sustainable-power = <2150>;
- thermal-sensors = <&d_tsensor 1>;
- trips {
- dswitch_on: trip-point@0 {
- temperature = <60000>;
- hysteresis = <5000>;
- type = "passive";
- };
- dcontrol: trip-point@1 {
- temperature = <75000>;
- hysteresis = <5000>;
- type = "passive";
- };
- dhot: trip-point@2 {
- temperature = <85000>;
- hysteresis = <5000>;
- type = "hot";
- };
- dcritical: trip-point@3 {
- temperature = <150000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- };
- };
- /*thermal zone end*/
}; /* end of / */
&pwm_AO_cd {
reg = <0x2c>; /*reg_address for lp8556*/
dev_name = "lp8556";
};
-
};
&audiobus {
/* Audio Related End */
-&aobus{
- uart_AO: serial@3000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <2>;
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_uart_pins>;
- support-sysrq = <0>; /* 0 not support , 1 support */
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <0 197 1>;
- status = "disable";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_b_uart_pins>;
- };
-};
-
&pwm_ef {
status = "okay";
};
internal_phy=<1>;
};
+
+&uart_A {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ /* "MMC_CAP_1_8V_DDR", */
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ /* caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&sd_emmc_b {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50";
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&sd_emmc_a {
+ status = "okay";
+ sdio {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&nand {
+ status = "disabled";
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+&pcie_A {
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&meson_cooldev {
+ status = "okay";
+};
+
+
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
};
-
secos_reserved:linux,secos {
status = "disable";
compatible = "amlogic, aml_secos_memory";
};
};
- meson-irblaster {
- compatible = "amlogic, meson_irblaster";
- dev_name = "meson-irblaster";
- reg = <0x0 0xff80014c 0x0 0x10>,
- <0x0 0xff800040 0x0 0x4>;
- pinctrl-names = "default";
- pinctrl-0 = <&irblaster_pins>;
- status = "okay";
- };
-
- vout {
- compatible = "amlogic, vout";
- dev_name = "vout";
- status = "okay";
- };
-
- vout2 {
- compatible = "amlogic, vout2";
- dev_name = "vout";
- status = "okay";
- };
-
- amhdmitx: amhdmitx{
- compatible = "amlogic, amhdmitx";
- dev_name = "amhdmitx";
- status = "okay";
- vend-data = <&vend_data>;
- pinctrl-names="default", "hdmitx_i2c";
- pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
- pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_VPU_MUX>;
- clock-names = "hdmi_vapb_clk",
- "hdmi_vpu_clk";
- /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
- interrupts = <0 57 1>;
- interrupt-names = "hdmitx_hpd";
- /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
- * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
- * 10:G12A
- */
- ic_type = <10>;
- vend_data: vend_data{ /* Should modified by Customer */
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* standards.ieee.org/develop/regauth/oui/oui.txt */
- vendor_id = <0x000000>;
- };
- };
-
- vdac {
- compatible = "amlogic, vdac";
- dev_name = "vdac";
- status = "okay";
- };
-
cvbsout {
compatible = "amlogic, cvbsout-g12a";
dev_name = "cvbsout";
status = "okay";
-
/* performance: reg_address, reg_value */
/* s905x */
performance = <0x1bf0 0x9
};
};
- pcie_A: pcieA@fc000000 {
- compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
- reg = <0x0 0xfc000000 0x0 0x400000
- 0x0 0xff648000 0x0 0x2000
- 0x0 0xfc400000 0x0 0x200000
- 0x0 0xff646000 0x0 0x2000
- 0x0 0xffd01080 0x0 0x10>;
- reg-names = "elbi", "cfg", "config", "phy", "reset";
- reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
- interrupts = <0 221 0>, <0 223 0>;
- #interrupt-cells = <1>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
- /* downstream I/O */
- 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
- /* non-prefetchable memory */
- num-lanes = <1>;
- pcie-num = <1>;
-
- clocks = <&clkc CLKID_PCIE_PLL
- &clkc CLKID_PCIE_COMB
- &clkc CLKID_PCIE_PHY>;
- clock-names = "pcie_refpll",
- "pcie",
- "pcie_phy";
- /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
- gpio-type = <2>;
- pcie-apb-rst-bit = <15>;
- pcie-phy-rst-bit = <14>;
- pcie-ctrl-a-rst-bit = <12>;
- status = "okay";
- };
-
- sd_emmc_c: emmc@ffe07000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe07000 0x0 0x800>;
- interrupts = <0 191 1>;
- pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
- pinctrl-0 = <&emmc_clk_cmd_pins>;
- pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <8>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- /* mmc-ddr-1_8v; */
- /* mmc-hs200-1_8v; */
-
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- emmc {
- pinname = "emmc";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_8_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_NONREMOVABLE",
- /* "MMC_CAP_1_8V_DDR", */
- "MMC_CAP_HW_RESET",
- "MMC_CAP_ERASE",
- "MMC_CAP_CMD23";
- /* caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
- f_min = <400000>;
- f_max = <200000000>;
- tx_delay = <0>;
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
- hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
- card_type = <1>;
- /* 1:mmc card(include eMMC),
- * 2:sd card(include tSD)
- */
- };
- };
-
- sd_emmc_b:sd@ffe05000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe05000 0x0 0x800>;
- interrupts = <0 190 1>;
-
- pinctrl-names = "sd_all_pins",
- "sd_clk_cmd_pins";
- pinctrl-0 = <&sd_all_pins>;
- pinctrl-1 = <&sd_clk_cmd_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- sd {
- pinname = "sd";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_4_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_UHS_SDR12",
- "MMC_CAP_UHS_SDR25",
- "MMC_CAP_UHS_SDR50";
- f_min = <400000>;
- f_max = <200000000>;
- max_req_size = <0x20000>; /**128KB*/
- gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
- jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
- gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
- card_type = <5>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- };
- };
- sd_emmc_a:sdio@ffe03000 {
- status = "okay";
- compatible = "amlogic, meson-mmc-g12a";
- reg = <0x0 0xffe03000 0x0 0x800>;
- interrupts = <0 189 4>;
-
- pinctrl-names = "sdio_all_pins",
- "sdio_clk_cmd_pins";
- pinctrl-0 = <&sdio_all_pins>;
- pinctrl-1 = <&sdio_clk_cmd_pins>;
-
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_P0_COMP>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_FCLK_DIV5>,
- <&xtal>;
- clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
-
- bus-width = <4>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
- sdio {
- pinname = "sdio";
- ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
- caps = "MMC_CAP_4_BIT_DATA",
- "MMC_CAP_MMC_HIGHSPEED",
- "MMC_CAP_SD_HIGHSPEED",
- "MMC_CAP_NONREMOVABLE",
- "MMC_CAP_UHS_SDR12",
- "MMC_CAP_UHS_SDR25",
- "MMC_CAP_UHS_SDR50",
- "MMC_CAP_UHS_SDR104",
- "MMC_PM_KEEP_POWER",
- "MMC_CAP_SDIO_IRQ";
- f_min = <400000>;
- f_max = <200000000>;
- /* max_req_size = <0x20000>; */ /**128KB*/
- max_req_size = <0x400>;
- card_type = <3>;
- /* 3:sdio device(ie:sdio-wifi),
- * 4:SD combo (IO+mem) card
- */
- dmode = "pio";
- };
- };
- nand: nfc@0 {
- compatible = "amlogic, aml_mtd_nand";
- dev_name = "mtdnand";
- status = "disabled";
- reg = <0x0 0xFFE07800 0x0 0x200>;
- interrupts = <0 34 1>;
-
- pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
- pinctrl-0 = <&all_nand_pins>;
- pinctrl-1 = <&all_nand_pins>;
- pinctrl-2 = <&nand_cs_pins>;
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_P0_COMP>;
- clock-names = "core", "clkin";
-
- device_id = <0>;
- /*fip/tpl configurations, must be same
- * with uboot if bl_mode was set as 1
- * bl_mode: 0 compact mode; 1 descrete mode
- * if bl_mode was set as 1, fip configuration will work
- */
- bl_mode = <1>;
- /*copy count of fip*/
- fip_copies = <4>;
- /*size of each fip copy */
- fip_size = <0x200000>;
- nand_clk_ctrl = <0xFFE07000>;
- plat-names = "bootloader","nandnormal";
- plat-num = <2>;
- plat-part-0 = <&bootloader>;
- plat-part-1 = <&nandnormal>;
- bootloader: bootloader{
- enable_pad ="ce0";
- busy_pad = "rb0";
- timming_mode = "mode5";
- bch_mode = "bch8_1k";
- t_rea = <20>;
- t_rhoh = <15>;
- chip_num = <1>;
- part_num = <0>;
- rb_detect = <1>;
- };
- nandnormal: nandnormal{
- enable_pad ="ce0";
- busy_pad = "rb0";
- timming_mode = "mode5";
- bch_mode = "bch8_1k";
- plane_mode = "twoplane";
- t_rea = <20>;
- t_rhoh = <15>;
- chip_num = <2>;
- part_num = <3>;
- partition = <&nand_partitions>;
- rb_detect = <1>;
- };
- nand_partitions:nand_partition{
- /*
- * if bl_mode is 1, tpl size was generate by
- * fip_copies * fip_size which
- * will not skip bad when calculating
- * the partition size;
- *
- * if bl_mode is 0,
- * tpl partition must be comment out.
- */
- tpl{
- offset=<0x0 0x0>;
- size=<0x0 0x0>;
- };
- logo{
- offset=<0x0 0x0>;
- size=<0x0 0x200000>;
- };
- recovery{
- offset=<0x0 0x0>;
- size=<0x0 0x1000000>;
- };
- boot{
- offset=<0x0 0x0>;
- size=<0x0 0x1000000>;
- };
- system{
- offset=<0x0 0x0>;
- size=<0x0 0x4000000>;
- };
- data{
- offset=<0xffffffff 0xffffffff>;
- size=<0x0 0x0>;
- };
- };
- };
-
- uart_A: serial@ffd24000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd24000 0x0 0x18>;
- interrupts = <0 26 1>;
- status = "okay";
- clocks = <&xtal
- &clkc CLKID_UART0>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 128 >;
- pinctrl-names = "default";
- pinctrl-0 = <&a_uart_pins>;
- };
-
- uart_B: serial@ffd23000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd23000 0x0 0x18>;
- interrupts = <0 75 1>;
- status = "disable";
- clocks = <&xtal
- &clkc CLKID_UART1>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&b_uart_pins>;
- };
-
- uart_C: serial@ffd22000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0xffd22000 0x0 0x18>;
- interrupts = <0 93 1>;
- status = "disable";
- clocks = <&xtal
- &clkc CLKID_UART1>;
- clock-names = "clk_uart",
- "clk_gate";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&c_uart_pins>;
- };
-
- aocec: aocec {
- compatible = "amlogic, aocec-g12a";
- device_name = "aocec";
- status = "okay";
- vendor_name = "Amlogic"; /* Max Chars: 8 */
- /* Refer to the following URL at:
- * http://standards.ieee.org/develop/regauth/oui/oui.txt
- */
- vendor_id = <0x000000>;
- product_desc = "G12A"; /* Max Chars: 16 */
- cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
- port_num = <1>;
- ee_cec;
- arc_port_mask = <0x2>;
- interrupts = <0 203 1>;
- interrupt-names = "hdmi_aocecb";
- pinctrl-names = "default";
- pinctrl-0=<&eecec_b>;
- reg = <0x0 0xFF80023c 0x0 0x4
- 0x0 0xFF800000 0x0 0x400>;
- };
-
-
- canvas{
- compatible = "amlogic, meson, canvas";
- dev_name = "amlogic-canvas";
- status = "okay";
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
-
- codec_io {
- compatible = "amlogic, codec_io";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_cbus_base{
- reg = <0x0 0xffd00000 0x0 0x100000>;
- };
- io_dos_base{
- reg = <0x0 0xff620000 0x0 0x10000>;
- };
- io_hiubus_base{
- reg = <0x0 0xff63c000 0x0 0x2000>;
- };
- io_aobus_base{
- reg = <0x0 0xff800000 0x0 0x10000>;
- };
- io_vcbus_base{
- reg = <0x0 0xff900000 0x0 0x40000>;
- };
- io_dmc_base{
- reg = <0x0 0xff638000 0x0 0x2000>;
- };
- io_efuse_base{
- reg = <0x0 0xff630000 0x0 0x2000>;
- };
- };
-
codec_mm {
compatible = "amlogic, codec, mm";
memory-region = <&codec_mm_cma &codec_mm_reserved>;
status = "okay";
};
- mesonstream {
- compatible = "amlogic, codec, streambuf";
- dev_name = "mesonstream";
- status = "okay";
- clocks = <&clkc CLKID_DOS_PARSER
- &clkc CLKID_DEMUX
- &clkc CLKID_DOS
- &clkc CLKID_VDEC_MUX
- &clkc CLKID_HCODEC_MUX
- &clkc CLKID_HEVC_MUX
- &clkc CLKID_HEVCF_MUX>;
- clock-names = "parser_top",
- "demux",
- "vdec",
- "clk_vdec_mux",
- "clk_hcodec_mux",
- "clk_hevc_mux",
- "clk_hevcb_mux";
- };
-
- vdec {
- compatible = "amlogic, vdec";
- dev_name = "vdec.0";
- status = "okay";
- interrupts = <0 3 1
- 0 23 1
- 0 32 1
- 0 43 1
- 0 44 1
- 0 45 1>;
- interrupt-names = "vsync",
- "demux",
- "parser",
- "mailbox_0",
- "mailbox_1",
- "mailbox_2";
- };
-
- rdma{
- compatible = "amlogic, meson, rdma";
- dev_name = "amlogic-rdma";
- status = "okay";
- interrupts = <0 89 1>;
- interrupt-names = "rdma";
- };
-
- ge2d {
- compatible = "amlogic, ge2d-g12a";
- dev_name = "ge2d";
- status = "okay";
- interrupts = <0 146 1>;
- interrupt-names = "ge2d";
- clocks = <&clkc CLKID_VAPB_MUX>,
- <&clkc CLKID_G2D>,
- <&clkc CLKID_GE2D_GATE>;
- clock-names = "clk_vapb_0",
- "clk_ge2d",
- "clk_ge2d_gate";
- reg = <0x0 0xff940000 0x0 0x10000>;
- };
-
ppmgr {
compatible = "amlogic, ppmgr";
memory-region = <&ppmgr_reserved>;
status = "okay";
};
- amvenc_avc{
- compatible = "amlogic, amvenc_avc";
- dev_name = "amvenc_avc";
- status = "okay";
- interrupts = <0 45 1>;
- interrupt-names = "mailbox_2";
- };
-
- hevc_enc{
- compatible = "cnm, HevcEnc";
- //memory-region = <&hevc_enc_reserved>;
- dev_name = "HevcEnc";
- status = "okay";
- interrupts = <0 187 1>;
- interrupt-names = "wave420l_irq";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- io_reg_base{
- reg = <0x0 0xff610000 0x0 0x4000>;
- };
- };
-
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
dev_name = "ionvideo";
status = "okay";
};
- /*if you want to use vdin just modify status to "ok"*/
- vdin0 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin0_cma_reserved>;
- dev_name = "vdin0";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
- /*MByte, if 10bit disable: 64M(YUV422),
- *if 10bit enable: 64*1.5 = 96M(YUV422)
- *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
- *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
- *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
- *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
- */
- /*cma_size = <16>;*/
- interrupts = <0 83 1>;
- rdma-irq = <2>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <0>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- *bit4:support yuv422 10bit full pack mode (from txl new add)
- */
- tv_bit_mode = <0x15>;
- };
- vdin1 {
- compatible = "amlogic, vdin";
- memory-region = <&vdin1_cma_reserved>;
- dev_name = "vdin1";
- status = "okay";
- reserve-iomap = "true";
- flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
- interrupts = <0 85 1>;
- rdma-irq = <4>;
- /*clocks = <&clock CLK_FPLL_DIV5>,
- * <&clock CLK_VDIN_MEAS_CLK>;
- *clock-names = "fclk_div5", "cts_vdin_meas_clk";
- */
- vdin_id = <1>;
- /*vdin write mem color depth support:
- *bit0:support 8bit
- *bit1:support 9bit
- *bit2:support 10bit
- *bit3:support 12bit
- */
- tv_bit_mode = <1>;
- };
unifykey{
compatible = "amlogic, unifykey";
status = "ok";
-
unifykey-num = <14>;
unifykey-index-0 = <&keysn_0>;
unifykey-index-1 = <&keysn_1>;
size = <16>;
};
};//End efusekey
+
amlvecm {
compatible = "amlogic, vecm";
dev_name = "aml_vecm";
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
};
+
amdolby_vision {
compatible = "amlogic, aml_amdolby_vision_driver";
dev_name = "aml_amdolby_vision_driver";
status = "okay";
};
- meson-amvideom {
- compatible = "amlogic, amvideom";
- dev_name = "amvideom";
- status = "okay";
- interrupts = <0 3 1>;
- interrupt-names = "vsync";
- };
meson-fb {
compatible = "amlogic, meson-g12a";
};
/* Audio Related start */
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- pdm_bus {
- reg = <0x0 0xFF640000 0x0 0x2000>;
- };
- audiobus_base {
- reg = <0x0 0xFF642000 0x0 0x2000>;
- };
- audiolocker_base {
- reg = <0x0 0xFF64A000 0x0 0x2000>;
- };
- eqdrc_base {
- reg = <0x0 0xFF642800 0x0 0x1800>;
- };
- reset_base {
- reg = <0x0 0xFFD01000 0x0 0x1000>;
- };
- };
pdm_codec:dummy{
#sound-dai-cells = <0>;
compatible = "amlogic, pdm_dummy_codec";
status = "okay";
};
- vddcpu0: pwmao_d-regulator {
- compatible = "pwm-regulator";
- pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>;
- regulator-name = "vddcpu0";
- regulator-min-microvolt = <731000>;
- regulator-max-microvolt = <1011000>;
- regulator-always-on;
- max-duty-cycle = <1210>;
- /* Voltage Duty-Cycle */
- voltage-table = <1011000 0>,
- <1001000 6>,
- <991000 9>,
- <981000 12>,
- <971000 16>,
- <961000 19>,
- <951000 23>,
- <941000 26>,
- <931000 29>,
- <921000 33>,
- <911000 36>,
- <901000 39>,
- <891000 43>,
- <881000 46>,
- <871000 50>,
- <861000 53>,
- <851000 56>,
- <841000 60>,
- <831000 63>,
- <821000 67>,
- <811000 70>,
- <801000 73>,
- <791000 77>,
- <781000 80>,
- <771000 84>,
- <761000 87>,
- <751000 90>,
- <741000 94>,
- <731000 100>;
-
- status = "okay";
- };
-
- meson_cooldev: meson-cooldev@0 {
- status = "okay";
- compatible = "amlogic, meson-cooldev";
- device_name = "mcooldev";
- cooling_devices {
- cpufreq_cool_cluster0 {
- min_state = <1000000>;
- dyn_coeff = <140>;
- cluster_id = <0>;
- node_name = "cpufreq_cool0";
- device_type = "cpufreq";
- };
- cpucore_cool_cluster0 {
- min_state = <1>;
- dyn_coeff = <0>;
- cluster_id = <0>;
- node_name = "cpucore_cool0";
- device_type = "cpucore";
- };
- };
- cpufreq_cool0:cpufreq_cool0 {
- #cooling-cells = <2>; /* min followed by max */
- };
- cpucore_cool0:cpucore_cool0 {
- #cooling-cells = <2>; /* min followed by max */
- };
- };
- /*meson cooling devices end*/
-
- thermal-zones {
- soc_thermal: soc_thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- sustainable-power = <2150>;
- thermal-sensors = <&p_tsensor 0>;
- trips {
- pswitch_on: trip-point@0 {
- temperature = <60000>;
- hysteresis = <5000>;
- type = "passive";
- };
- pcontrol: trip-point@1 {
- temperature = <75000>;
- hysteresis = <5000>;
- type = "passive";
- };
- phot: trip-point@2 {
- temperature = <85000>;
- hysteresis = <5000>;
- type = "hot";
- };
- pcritical: trip-point@3 {
- temperature = <150000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- cpufreq_cooling_map {
- trip = <&pcontrol>;
- cooling-device = <&cpufreq_cool0 0 4>;
- contribution = <1024>;
- };
- cpucore_cooling_map {
- trip = <&pcontrol>;
- cooling-device = <&cpucore_cool0 0 3>;
- contribution = <1024>;
- };
- };
- };
- ddr_thermal: ddr_thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- sustainable-power = <2150>;
- thermal-sensors = <&d_tsensor 1>;
- trips {
- dswitch_on: trip-point@0 {
- temperature = <60000>;
- hysteresis = <5000>;
- type = "passive";
- };
- dcontrol: trip-point@1 {
- temperature = <75000>;
- hysteresis = <5000>;
- type = "passive";
- };
- dhot: trip-point@2 {
- temperature = <85000>;
- hysteresis = <5000>;
- type = "hot";
- };
- dcritical: trip-point@3 {
- temperature = <150000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- };
- };
- /*thermal zone end*/
}; /* end of / */
&pwm_AO_cd {
/* Audio Related End */
-&aobus{
- uart_AO: serial@3000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <0 193 1>;
- status = "okay";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- xtal_tick_en = <2>;
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_uart_pins>;
- support-sysrq = <0>; /* 0 not support , 1 support */
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic, meson-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <0 197 1>;
- status = "disable";
- clocks = <&xtal>;
- clock-names = "clk_uart";
- fifosize = < 64 >;
- pinctrl-names = "default";
- pinctrl-0 = <&ao_b_uart_pins>;
- };
-};
-
&pwm_ef {
status = "okay";
};
internal_phy=<1>;
};
+
+&uart_A {
+ status = "okay";
+};
+
+/*if you want to use vdin just modify status to "ok"*/
+&vdin0 {
+ memory-region = <&vdin0_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+};
+&vdin1 {
+ memory-region = <&vdin1_cma_reserved>;
+ status = "okay";
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+};
+
+
+&sd_emmc_c {
+ status = "okay";
+ emmc {
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ /* "MMC_CAP_1_8V_DDR", */
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ /* caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&sd_emmc_b {
+ status = "okay";
+ sd {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50";
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&sd_emmc_a {
+ status = "okay";
+ sdio {
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ };
+};
+
+&nand {
+ status = "disabled";
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+};
+
+&pcie_A {
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&meson_cooldev {
+ status = "okay";
+};
+
+
pinctrl-names="default";
pinctrl-0=<&ao_i2c_slave_pins>;
};
+
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x3000 0x0 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <1>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_uart_pins>;
+ support-sysrq = <0>; /* 0 not support*/
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x4000 0x0 0x18>;
+ interrupts = <0 197 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
};/* end of aobus */
periphs: periphs@ff634400 {
};
};
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd24000 0x0 0x18>;
+ interrupts = <0 26 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd23000 0x0 0x18>;
+ interrupts = <0 75 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd22000 0x0 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+
+ pcie_A: pcieA@fc000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0x0 0xfc000000 0x0 0x400000
+ 0x0 0xff648000 0x0 0x2000
+ 0x0 0xfc400000 0x0 0x200000
+ 0x0 0xff646000 0x0 0x2000
+ 0x0 0xffd01080 0x0 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ interrupts = <0 221 0>, <0 223 0>;
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ num-lanes = <1>;
+ pcie-num = <1>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PHY>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <15>;
+ pcie-phy-rst-bit = <14>;
+ pcie-ctrl-a-rst-bit = <12>;
+ status = "disabled";
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ * 10:G12A
+ */
+ ic_type = <10>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-g12a";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "G12A"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ port_num = <1>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1>;
+ interrupt-names = "hdmi_aocecb";
+ pinctrl-names = "default";
+ pinctrl-0=<&eecec_b>;
+ reg = <0x0 0xFF80023c 0x0 0x4
+ 0x0 0xFF800000 0x0 0x400>;
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0: vdin0 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin0";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ };
+ vdin1: vdin1 {
+ compatible = "amlogic, vdin";
+ dev_name = "vdin1";
+ status = "disabled";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ canvas: canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-g12a";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 146 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0x0 0xff940000 0x0 0x10000>;
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ codec_io: codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_cbus_base{
+ reg = <0x0 0xffd00000 0x0 0x100000>;
+ };
+ io_dos_base{
+ reg = <0x0 0xff620000 0x0 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0x0 0xff63c000 0x0 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0x0 0xff800000 0x0 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0x0 0xff900000 0x0 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+ io_efuse_base{
+ reg = <0x0 0xff630000 0x0 0x2000>;
+ };
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX
+ &clkc CLKID_HEVCF_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux",
+ "clk_hevcb_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ //memory-region = <&hevc_enc_reserved>;
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_reg_base{
+ reg = <0x0 0xff610000 0x0 0x4000>;
+ };
+ };
+
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ irblaster: meson-irblaster {
+ compatible = "amlogic, meson_irblaster";
+ dev_name = "meson-irblaster";
+ reg = <0x0 0xff80014c 0x0 0x10>,
+ <0x0 0xff800040 0x0 0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ status = "okay";
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe07000 0x0 0x800>;
+ interrupts = <0 191 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ /* mmc-ddr-1_8v; */
+ /* mmc-hs200-1_8v; */
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /*caps defined in dts*/
+ tx_delay = <0>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b:sd@ffe05000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 1>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@ffe03000 {
+ status = "disabled";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe03000 0x0 0x800>;
+ interrupts = <0 189 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ /* max_req_size = <0x20000>; */ /**128KB*/
+ max_req_size = <0x400>;
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ dmode = "pio";
+ };
+ };
+
+ nand: nfc@0 {
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0x0 0xFFE07800 0x0 0x200>;
+ interrupts = <0 34 1>;
+
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+ clock-names = "core", "clkin";
+
+ device_id = <0>;
+ /*fip/tpl configurations, must be same
+ * with uboot if bl_mode was set as 1
+ * bl_mode: 0 compact mode; 1 descrete mode
+ * if bl_mode was set as 1, fip configuration will work
+ */
+ bl_mode = <1>;
+ /*copy count of fip*/
+ fip_copies = <4>;
+ /*size of each fip copy */
+ fip_size = <0x200000>;
+ nand_clk_ctrl = <0xFFE07000>;
+ /*partions defined in dts */
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "disabled";
+ compatible = "amlogic, meson-cooldev";
+ device_name = "mcooldev";
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ /*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ pswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ pcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ phot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ pcritical: trip-point@3 {
+ temperature = <150000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&pcontrol>;
+ cooling-device = <&cpucore_cool0 0 3>;
+ contribution = <1024>;
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <150000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ };
+ };
+ /*thermal zone end*/
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ pdm_bus {
+ reg = <0x0 0xFF640000 0x0 0x2000>;
+ };
+ audiobus_base {
+ reg = <0x0 0xFF642000 0x0 0x2000>;
+ };
+ audiolocker_base {
+ reg = <0x0 0xFF64A000 0x0 0x2000>;
+ };
+ eqdrc_base {
+ reg = <0x0 0xFF642800 0x0 0x1800>;
+ };
+ reset_base {
+ reg = <0x0 0xFFD01000 0x0 0x1000>;
+ };
+ };
+
+ vddcpu0: pwmao_d-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <731000>;
+ regulator-max-microvolt = <1011000>;
+ regulator-always-on;
+ max-duty-cycle = <1210>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1011000 0>,
+ <1001000 6>,
+ <991000 9>,
+ <981000 12>,
+ <971000 16>,
+ <961000 19>,
+ <951000 23>,
+ <941000 26>,
+ <931000 29>,
+ <921000 33>,
+ <911000 36>,
+ <901000 39>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 77>,
+ <781000 80>,
+ <771000 84>,
+ <761000 87>,
+ <751000 90>,
+ <741000 94>,
+ <731000 100>;
+ status = "okay";
+ };
};/* end of / */
&pinctrl_aobus {
projects / platform / kernel / linux-amlogic.git / commitdiff