* elf32-m32r.c: Fix formatting.
* elf32-m68hc11.c: Likewise.
* elf32-m68hc12.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-pj.c: Likewise.
* elf32-ppc.c: Likewise.
+2000-12-06 Kazu Hirata <kazu@hxi.com>
+
+ * elf32-m32r.c: Fix formatting.
+ * elf32-m68hc11.c: Likewise.
+ * elf32-m68hc12.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-mcore.c: Likewise.
+ * elf32-pj.c: Likewise.
+ * elf32-ppc.c: Likewise.
+
2000-12-05 Kazu Hirata <kazu@hxi.com>
* elf32-fr30.c: Fix formatting.
input_section, output_bfd, error_message);
}
-/* Do generic partial_inplace relocation.
- This is a local replacement for bfd_elf_generic_reloc. */
+/* Do generic partial_inplace relocation.
+ This is a local replacement for bfd_elf_generic_reloc. */
bfd_reloc_status_type
m32r_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
When the chip supports parallel 16 bit insns, things may change.
*/
-static boolean
+static boolean
m32r_elf_relax_section (abfd, sec, link_info, again)
bfd *abfd;
asection *sec;
elf_elfheader (abfd)->e_flags |= val;
}
-/* Function to keep M32R specific file flags. */
+/* Function to keep M32R specific file flags. */
static boolean
m32r_elf_set_private_flags (abfd, flags)
bfd * abfd;
to the default values. */
if (bfd_get_arch_info (ibfd)->the_default)
return true;
-
+
elf_flags_init (obfd) = true;
elf_elfheader (obfd)->e_flags = in_flags;
PTR ptr;
{
FILE * file = (FILE *) ptr;
-
+
BFD_ASSERT (abfd != NULL && ptr != NULL)
-
+
_bfd_elf_print_private_bfd_data (abfd, ptr);
-
+
fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
-
+
switch (elf_elfheader (abfd)->e_flags & EF_M32R_ARCH)
{
default:
case E_M32R_ARCH: fprintf (file, _(": m32r instructions")); break;
case E_M32RX_ARCH: fprintf (file, _(": m32rx instructions")); break;
}
-
+
fputc ('\n', file);
-
+
return true;
}
case R_M32R_GNU_VTINHERIT:
case R_M32R_GNU_VTENTRY:
break;
-
+
default:
switch (h->root.type)
{
case bfd_link_hash_defined:
case bfd_link_hash_defweak:
return h->root.u.def.section;
-
+
case bfd_link_hash_common:
return h->root.u.c.p->section;
return true;
}
-
/* Look through the relocs for a section during the first phase.
Since we don't do .gots or .plts, we just need to consider the
virtual table relocs for gc. */
-
+
static boolean
m32r_elf_check_relocs (abfd, info, sec, relocs)
bfd *abfd;
struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
const Elf_Internal_Rela *rel;
const Elf_Internal_Rela *rel_end;
-
+
if (info->relocateable)
return true;
-
+
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
- sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
+ sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
-
+
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
unsigned long r_symndx;
-
+
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-
+
switch (ELF32_R_TYPE (rel->r_info))
{
/* This relocation describes the C++ object vtable hierarchy.
if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
return false;
break;
-
+
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_M32R_GNU_VTENTRY:
break;
}
}
-
+
return true;
}
-
\f
#define ELF_ARCH bfd_arch_m32r
#define bfd_elf32_bfd_merge_private_bfd_data m32r_elf_merge_private_bfd_data
#define bfd_elf32_bfd_set_private_flags m32r_elf_set_private_flags
#define bfd_elf32_bfd_print_private_bfd_data m32r_elf_print_private_bfd_data
-
+
#include "elf32-target.h"
static void m68hc11_info_to_howto_rel
PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
-
/* Use REL instead of RELA to save space */
#define USE_REL
static void m68hc11_info_to_howto_rel
PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
-
/* Use REL instead of RELA to save space */
#define USE_REL
0x2f, 0x3b, 0x01, 0x70, /* move.l (%pc,addr),-(%sp) */
0, 0, 0, 0, /* replaced with offset to .got + 4. */
0x22, 0x7b, 0x01, 0x70, /* moveal %pc@(0xc), %a1 */
- 0, 0, 0, 0, /* replace with offset to .got +8. */
+ 0, 0, 0, 0, /* replace with offset to .got +8. */
0x4e, 0xd1, /* jmp %a1@ */
0, 0, 0, 0, /* pad out to 24 bytes. */
0, 0
if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
|| bfd_get_flavour (obfd) != bfd_target_elf_flavour)
return true;
-
+
in_flags = elf_elfheader (ibfd)->e_flags;
-
+
elf_elfheader (obfd)->e_flags = in_flags;
elf_flags_init (obfd) = true;
-
+
return true;
}
return true;
}
-
/* Adjust a symbol defined by a dynamic object and referenced by a
regular object. The current definition is in some section of the
dynamic object, but we're not including those sections. We have to
+ sgot->output_offset + 8
- (splt->output_section->vma + 10)),
splt->contents + 12);
- elf_section_data (splt->output_section)->this_hdr.sh_entsize
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize
= PLT_ENTRY_SIZE;
}
else /* cpu32 */
+ sgot->output_offset + 8
- (splt->output_section->vma + 10)),
splt->contents + 12);
- elf_section_data (splt->output_section)->this_hdr.sh_entsize
+ elf_section_data (splt->output_section)->this_hdr.sh_entsize
= PLT_CPU32_ENTRY_SIZE;
}
}
if (targetsec != NULL)
strncpy (p + 4, targetsec->output_section->name, 8);
}
-
+
if (free_extsyms != NULL)
free (free_extsyms);
if (free_relocs != NULL)
#include <assert.h>
#define USE_RELA /* Only USE_REL is actually significant, but this is
- here are a reminder... */
+ here are a reminder... */
static void mcore_elf_howto_init
PARAMS ((void));
false), /* pcrel_offset */
/* 8 bits + 2 zero bits; jmpi/jsri/lrw instructions.
- Should not appear in object files. */
+ Should not appear in object files. */
HOWTO (R_MCORE_PCRELIMM8BY4, /* type */
2, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0, /* dst_mask */
true), /* pcrel_offset */
- /* bsr/bt/bf/br instructions; 11 bits + 1 zero bit
+ /* bsr/bt/bf/br instructions; 11 bits + 1 zero bit
Span 2k instructions == 4k bytes.
Only useful pieces at the relocated address are the opcode (5 bits) */
HOWTO (R_MCORE_PCRELIMM11BY2,/* type */
0x7ff, /* dst_mask */
true), /* pcrel_offset */
- /* 4 bits + 1 zero bit; 'loopt' instruction only; unsupported. */
+ /* 4 bits + 1 zero bit; 'loopt' instruction only; unsupported. */
HOWTO (R_MCORE_PCRELIMM4BY2, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0, /* dst_mask */
true), /* pcrel_offset */
- /* 32-bit pc-relative. Eventually this will help support PIC code. */
+ /* 32-bit pc-relative. Eventually this will help support PIC code. */
HOWTO (R_MCORE_PCREL32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
/* Like PCRELIMM11BY2, this relocation indicates that there is a
'jsri' at the specified address. There is a separate relocation
- entry for the literal pool entry that it references, but we
+ entry for the literal pool entry that it references, but we
might be able to change the jsri to a bsr if the target turns out
to be close enough [even though we won't reclaim the literal pool
entry, we'll get some runtime efficiency back]. Note that this
- is a relocation that we are allowed to safely ignore. */
+ is a relocation that we are allowed to safely ignore. */
HOWTO (R_MCORE_PCRELJSR_IMM11BY2,/* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0x0, /* src_mask */
0x7ff, /* dst_mask */
true), /* pcrel_offset */
-
+
/* GNU extension to record C++ vtable hierarchy */
HOWTO (R_MCORE_GNU_VTINHERIT, /* type */
0, /* rightshift */
0, /* src_mask */
0, /* dst_mask */
false), /* pcrel_offset */
-
+
HOWTO (R_MCORE_RELATIVE, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
for (i = NUM_ELEM (mcore_elf_howto_raw); i--;)
{
unsigned int type;
-
+
type = mcore_elf_howto_raw[i].type;
-
+
BFD_ASSERT (type < NUM_ELEM (mcore_elf_howto_table));
-
+
mcore_elf_howto_table [type] = & mcore_elf_howto_raw [i];
}
}
mcore_elf_howto_init ();
BFD_ASSERT (ELF32_R_TYPE (dst->r_info) < (unsigned int) R_MCORE_max);
-
+
cache_ptr->howto = mcore_elf_howto_table [ELF32_R_TYPE (dst->r_info)];
}
-/* Function to set whether a module needs the -mrelocatable bit set. */
+/* Function to set whether a module needs the -mrelocatable bit set. */
static boolean
mcore_elf_set_private_flags (abfd, flags)
bfd * abfd;
new_flags = elf_elfheader (ibfd)->e_flags;
old_flags = elf_elfheader (obfd)->e_flags;
-
+
if (! elf_flags_init (obfd)) /* First call, no flags set */
{
elf_flags_init (obfd) = true;
char ** error_message ATTRIBUTE_UNUSED;
{
BFD_ASSERT (reloc_entry->howto != (reloc_howto_type *)0);
-
+
_bfd_error_handler (_("%s: Relocation %s (%d) is not currently supported.\n"),
bfd_get_filename (abfd),
reloc_entry->howto->name,
unsigned long r_symndx;
struct elf_link_hash_entry * h = (struct elf_link_hash_entry *) 0;
unsigned short oldinst = 0;
-
+
/* Unknown relocation handling */
if ((unsigned) r_type >= (unsigned) R_MCORE_max
|| ! mcore_elf_howto_table [(int)r_type])
ret = false;
continue;
}
-
+
howto = mcore_elf_howto_table [(int) r_type];
r_symndx = ELF32_R_SYM (rel->r_info);
-
+
if (info->relocateable)
{
/* This is a relocateable link. We don't have to change
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
-
+
if ((unsigned)ELF_ST_TYPE (sym->st_info) == STT_SECTION)
{
sec = local_sections[r_symndx];
break;
}
-
#ifdef DEBUG
fprintf (stderr, "\ttype = %s (%d), symbol index = %ld, offset = %ld, addend = %ld\n",
howto->name, r_type, r_symndx, (long) offset, (long) addend);
bfd_put_16 (input_bfd, oldinst, contents + offset);
r = bfd_reloc_ok;
}
-
+
if (r != bfd_reloc_ok)
{
ret = false;
-
+
switch (r)
{
default:
{
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
-
+
if (name == NULL)
break;
case bfd_link_hash_defined:
case bfd_link_hash_defweak:
return h->root.u.def.section;
-
+
case bfd_link_hash_common:
return h->root.u.c.p->section;
/* Look through the relocs for a section during the first phase.
Since we don't do .gots or .plts, we just need to consider the
virtual table relocs for gc. */
-
+
static boolean
mcore_elf_check_relocs (abfd, info, sec, relocs)
bfd * abfd;
struct elf_link_hash_entry ** sym_hashes_end;
const Elf_Internal_Rela * rel;
const Elf_Internal_Rela * rel_end;
-
+
if (info->relocateable)
return true;
-
+
symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
-
+
rel_end = relocs + sec->reloc_count;
-
+
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry * h;
unsigned long r_symndx;
-
+
r_symndx = ELF32_R_SYM (rel->r_info);
-
+
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
h = sym_hashes [r_symndx - symtab_hdr->sh_info];
-
+
switch (ELF32_R_TYPE (rel->r_info))
{
/* This relocation describes the C++ object vtable hierarchy.
if (!_bfd_elf32_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
return false;
break;
-
+
/* This relocation describes which C++ vtable entries are actually
used. Record for later use during GC. */
case R_MCORE_GNU_VTENTRY:
break;
}
}
-
+
return true;
}
#define elf_info_to_howto mcore_elf_info_to_howto
#define elf_info_to_howto_rel NULL
-
#define bfd_elf32_bfd_copy_private_bfd_data mcore_elf_copy_private_bfd_data
#define bfd_elf32_bfd_merge_private_bfd_data mcore_elf_merge_private_bfd_data
#define bfd_elf32_bfd_set_private_flags mcore_elf_set_private_flags
0xffff, /* dst_mask */
true), /* pcrel_offset */
-
HOWTO (R_PJ_CODE_HI16, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0, /* dst_mask */
false), /* pcrel_offset */
-
};
/* This function is used for normal relocs. This is like the COFF
return bfd_reloc_undefined;
if (bfd_is_com_section (symbol_in->section))
- sym_value = 0;
- else
+ sym_value = 0;
+ else
sym_value = (symbol_in->value +
symbol_in->section->output_section->vma +
symbol_in->section->output_offset);
break;
/* Relocations in code are always bigendian, no matter what the
- data endianness is. */
+ data endianness is. */
case R_PJ_CODE_DIR32:
insn = bfd_getb32 (hit_data);
insn += (sym_value + reloc_entry->addend) >> 16;
bfd_putb16 (insn, hit_data);
break;
-
+
default:
abort ();
break;
bfd_reloc_code_real_type code;
{
unsigned int i;
-
+
for (i = 0; i < sizeof (pj_reloc_map) / sizeof (struct elf_reloc_map); i++)
{
if (pj_reloc_map[i].bfd_reloc_val == code)
}
/* Take this moment to fill in the special picoJava bits in the
- e_flags field. */
+ e_flags field. */
static void
pj_elf_final_write_processing (abfd, linker)
#define USE_RELA /* we want RELA relocations, not REL */
-
static reloc_howto_type *ppc_elf_reloc_type_lookup
PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
static void ppc_elf_info_to_howto
true), /* pcrel_offset */
/* 32-bit relocation to the symbol's procedure linkage table.
- FIXME: not supported. */
+ FIXME: not supported. */
HOWTO (R_PPC_PLT32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
false), /* pcrel_offset */
/* 32-bit PC relative relocation to the symbol's procedure linkage table.
- FIXME: not supported. */
+ FIXME: not supported. */
HOWTO (R_PPC_PLTREL32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
0xffff, /* dst_mask */
false), /* pcrel_offset */
- /* 32-bit section relative relocation. */
+ /* 32-bit section relative relocation. */
HOWTO (R_PPC_SECTOFF, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
0, /* dst_mask */
true), /* pcrel_offset */
- /* 16-bit lower half section relative relocation. */
+ /* 16-bit lower half section relative relocation. */
HOWTO (R_PPC_SECTOFF_LO, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0xffff, /* dst_mask */
false), /* pcrel_offset */
- /* 16-bit upper half section relative relocation. */
+ /* 16-bit upper half section relative relocation. */
HOWTO (R_PPC_SECTOFF_HI, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
0xffff, /* dst_mask */
false), /* pcrel_offset */
- /* 16-bit upper half adjusted section relative relocation. */
+ /* 16-bit upper half adjusted section relative relocation. */
HOWTO (R_PPC_SECTOFF_HA, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
for (i = 0; i < sizeof (ppc_elf_howto_raw) / sizeof (ppc_elf_howto_raw[0]); i++)
{
type = ppc_elf_howto_raw[i].type;
- BFD_ASSERT (type < sizeof(ppc_elf_howto_table) / sizeof(ppc_elf_howto_table[0]));
+ BFD_ASSERT (type < sizeof (ppc_elf_howto_table) / sizeof (ppc_elf_howto_table[0]));
ppc_elf_howto_table[type] = &ppc_elf_howto_raw[i];
}
}
3/ The branch is taken.
4/ The branch is located in the last 5 words of a page.
(The EOP limit is 5 by default but may be specified as any value from 1-10.)
-
+
Our software solution is to detect these problematic branches in a
linker pass and modify them as follows:
1/ Unconditional branches - Since these are always predicted taken,
const Elf_Internal_Rela **rela1 = (const Elf_Internal_Rela**) arg1;
const Elf_Internal_Rela **rela2 = (const Elf_Internal_Rela**) arg2;
- /* Sort by offset. */
+ /* Sort by offset. */
return ((*rela1)->r_offset - (*rela2)->r_offset);
}
Elf_Internal_Rela **rela_comb = NULL;
int comb_curr, comb_count;
- /* We never have to do this more than once per input section. */
+ /* We never have to do this more than once per input section. */
*again = false;
/* If needed, initialize this section's cooked size. */
isec->_cooked_size = isec->_raw_size;
/* We're only interested in text sections which overlap the
- troublesome area at the end of a page. */
+ troublesome area at the end of a page. */
if (link_info->mpc860c0 && (isec->flags & SEC_CODE) && isec->_cooked_size)
{
bfd_vma dot, end_page, end_section;
boolean section_modified;
- /* Get the section contents. */
+ /* Get the section contents. */
/* Get cached copy if it exists. */
if (elf_section_data (isec)->this_hdr.contents != NULL)
contents = elf_section_data (isec)->this_hdr.contents;
/* Get a copy of the native relocations. */
internal_relocs = _bfd_elf32_link_read_relocs (
- abfd, isec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
+ abfd, isec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
link_info->keep_memory);
if (internal_relocs == NULL)
goto error_return;
if (! link_info->keep_memory)
free_relocs = internal_relocs;
-
- /* Setup a faster access method for the reloc info we need. */
+
+ /* Setup a faster access method for the reloc info we need. */
rela_comb = (Elf_Internal_Rela**)
- bfd_malloc (isec->reloc_count*sizeof(Elf_Internal_Rela*));
+ bfd_malloc (isec->reloc_count*sizeof (Elf_Internal_Rela*));
if (rela_comb == NULL)
goto error_return;
for (n=0; n<isec->reloc_count; ++n)
{
long r_type;
-
+
r_type = ELF32_R_TYPE (internal_relocs[n].r_info);
if (r_type < 0 || r_type >= (int)R_PPC_max)
goto error_return;
-
+
/* Prologue constants are sometimes present in the ".text"
sections and they can be identified by their associated relocation.
We don't want to process those words and some others which
conditional branches will have a relocation so we will
only ignore words that 1) have a reloc, and 2) the reloc
is not applicable to a conditional branch.
- The array rela_comb is built here for use in the EOP scan loop. */
+ The array rela_comb is built here for use in the EOP scan loop. */
switch (r_type)
{
case R_PPC_ADDR14_BRNTAKEN: /* absolute, predicted not taken */
- case R_PPC_REL14: /* relative cond. br. */
+ case R_PPC_REL14: /* relative cond. br. */
case R_PPC_REL14_BRNTAKEN: /* rel. cond. br., predicted not taken */
- /* We should check the instruction. */
+ /* We should check the instruction. */
break;
default:
- /* The word is not a conditional branch - ignore it. */
+ /* The word is not a conditional branch - ignore it. */
rela_comb[comb_count++] = &internal_relocs[n];
break;
}
qsort (rela_comb, (size_t) comb_count, sizeof (int), ppc_elf_sort_rela);
}
- /* Enumerate each EOP region that overlaps this section. */
+ /* Enumerate each EOP region that overlaps this section. */
end_section = isec->vma + isec->_cooked_size;
dot = end_page = (isec->vma | (PAGESIZE - 1)) + 1;
dot -= link_info->mpc860c0;
section_modified = false;
if (dot < isec->vma) /* Increment the start position if this section */
- dot = isec->vma; /* begins in the middle of its first EOP region. */
+ dot = isec->vma; /* begins in the middle of its first EOP region. */
for (;
dot < end_section;
dot += PAGESIZE, end_page += PAGESIZE)
{
- /* Check each word in this EOP region. */
+ /* Check each word in this EOP region. */
for (; dot < end_page; dot += 4)
{
bfd_vma isec_offset;
boolean skip, modified;
/* Don't process this word if there is a relocation for it and
- the relocation indicates the word is not a conditional branch. */
+ the relocation indicates the word is not a conditional branch. */
skip = false;
isec_offset = dot - isec->vma;
for (; comb_curr<comb_count; ++comb_curr)
}
if (skip) continue;
- /* Check the current word for a problematic conditional branch. */
+ /* Check the current word for a problematic conditional branch. */
#define BO0(insn) ((insn) & 0x02000000)
#define BO2(insn) ((insn) & 0x00800000)
#define BO4(insn) ((insn) & 0x00200000)
{
bfd_vma target;
/* This branch is predicted as "normal".
- If this is a forward branch, it is problematic. */
+ If this is a forward branch, it is problematic. */
target = insn & 0x0000Fffc; /*extract*/
target = (target ^ 0x8000) - 0x8000; /*sign extend*/
/* This branch is predicted as not-taken.
If this is a forward branch, it is problematic.
Since we can't tell statically if it will branch forward,
- always set the prediction bit. */
+ always set the prediction bit. */
insn |= 0x00200000; /* set the prediction bit */
modified = true;
}
/* This branch is predicted as not-taken.
If this is a forward branch, it is problematic.
Since we can't tell statically if it will branch forward,
- always set the prediction bit. */
+ always set the prediction bit. */
insn |= 0x00200000; /* set the prediction bit */
modified = true;
}
return bfd_reloc_continue;
}
-/* Function to set whether a module needs the -mrelocatable bit set. */
+/* Function to set whether a module needs the -mrelocatable bit set. */
static boolean
ppc_elf_set_private_flags (abfd, flags)
&& (h->elf_link_hash_flags
& ELF_LINK_HASH_DEF_REGULAR) == 0)));
-
/* If this is a function, put it in the procedure linkage table. We
will fill in the contents of the procedure linkage table later,
when we know the address of the .got section. */
asection *target;
const char *outname;
- /* Remember whether there are any relocation sections. */
+ /* Remember whether there are any relocation sections. */
relocs = true;
/* If this relocation section applies to a read only
return false;
}
-
if ((sdata2 = elf_linker_section (abfd, LINKER_SECTION_SDATA2)) == NULL)
{
sdata2 = ppc_elf_create_linker_section (abfd, info, LINKER_SECTION_SDATA2);
local_got_refcounts = elf_local_got_refcounts (abfd);
sym_hashes = elf_sym_hashes (abfd);
- sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof(Elf32_External_Sym);
+ sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
if (!elf_bad_symtab (abfd))
sym_hashes_end -= symtab_hdr->sh_info;
Otherwise, the PLT entry would provide a definition for
the symbol even if the symbol wasn't defined anywhere,
and so the symbol would never be NULL. */
- if ((h->elf_link_hash_flags & ELF_LINK_HASH_REF_REGULAR_NONWEAK)
+ if ((h->elf_link_hash_flags & ELF_LINK_HASH_REF_REGULAR_NONWEAK)
== 0)
sym->st_value = 0;
}
relocation = 0;
else
{
- if (! (*info->callbacks->undefined_symbol)(info,
+ if (! (*info->callbacks->undefined_symbol) (info,
h->root.root.string,
input_bfd,
input_section,
#ifdef DEBUG
if (indx <= 0)
{
- printf("indx=%d section=%s flags=%08x name=%s\n",
+ printf ("indx=%d section=%s flags=%08x name=%s\n",
indx, osec->name, osec->flags,
h->root.root.string);
}
}
break;
-
/* relocate against _SDA2_BASE_ */
case (int)R_PPC_EMB_SDA2REL:
{
sym_name,
ppc_elf_howto_table[ (int)r_type ]->name,
name);
-
+
bfd_set_error (bfd_error_bad_value);
ret = false;
continue;
}
break;
-
/* relocate against either _SDA_BASE_, _SDA2_BASE_, or 0 */
case (int)R_PPC_EMB_SDA21:
case (int)R_PPC_EMB_RELSDA:
continue;
}
-
#ifdef DEBUG
fprintf (stderr, "\ttype = %s (%d), name = %s, symbol index = %ld, offset = %ld, addend = %ld\n",
howto->name,
name = bfd_section_name (input_bfd, sec);
}
- if (! (*info->callbacks->reloc_overflow)(info,
+ if (! (*info->callbacks->reloc_overflow) (info,
name,
howto->name,
(bfd_vma) 0,