staging: rtl8192e: Rename SetRFPowerSta.., RfReg0Value and bTXPowerDa..

Rename variable SetRFPowerStateInProgress to set_rf_pwr_state_in_progress,
RfReg0Value to rf_reg_0value and bTXPowerDataReadFromEEPORM to
tx_pwr_data_read_from_eeprom to avoid CamelCase which is not accepted by
checkpatch.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/01ff54a2c135ba6e3d06255102679d496fd2aef1.1673290428.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
index 06ab022..ebf1fa5 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
@@ -345,9 +345,9 @@ static void _rtl92e_read_eeprom_info(struct net_device *dev)
        }
 
        if (priv->card_8192_version > VERSION_8190_BD)
-               priv->bTXPowerDataReadFromEEPORM = true;
+               priv->tx_pwr_data_read_from_eeprom = true;
        else
-               priv->bTXPowerDataReadFromEEPORM = false;
+               priv->tx_pwr_data_read_from_eeprom = false;
 
        priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
 

diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index cc7e72f..2e9932a 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -101,17 +101,17 @@ static u32 _rtl92e_phy_rf_read(struct net_device *dev,
        if (priv->rf_chip == RF_8256) {
                rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
                if (Offset >= 31) {
-                       priv->RfReg0Value[eRFPath] |= 0x140;
+                       priv->rf_reg_0value[eRFPath] |= 0x140;
                        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
                                          bMaskDWord,
-                                         (priv->RfReg0Value[eRFPath]<<16));
+                                         (priv->rf_reg_0value[eRFPath] << 16));
                        NewOffset = Offset - 30;
                } else if (Offset >= 16) {
-                       priv->RfReg0Value[eRFPath] |= 0x100;
-                       priv->RfReg0Value[eRFPath] &= (~0x40);
+                       priv->rf_reg_0value[eRFPath] |= 0x100;
+                       priv->rf_reg_0value[eRFPath] &= (~0x40);
                        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
                                          bMaskDWord,
-                                         (priv->RfReg0Value[eRFPath]<<16));
+                                         (priv->rf_reg_0value[eRFPath] << 16));
 
                        NewOffset = Offset - 15;
                } else
@@ -130,10 +130,10 @@ static u32 _rtl92e_phy_rf_read(struct net_device *dev,
                                bLSSIReadBackData);
 
        if (priv->rf_chip == RF_8256) {
-               priv->RfReg0Value[eRFPath] &= 0xebf;
+               priv->rf_reg_0value[eRFPath] &= 0xebf;
 
                rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
-                                 (priv->RfReg0Value[eRFPath] << 16));
+                                 (priv->rf_reg_0value[eRFPath] << 16));
 
                rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
        }
@@ -156,17 +156,17 @@ static void _rtl92e_phy_rf_write(struct net_device *dev,
                rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
 
                if (Offset >= 31) {
-                       priv->RfReg0Value[eRFPath] |= 0x140;
+                       priv->rf_reg_0value[eRFPath] |= 0x140;
                        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
                                          bMaskDWord,
-                                         (priv->RfReg0Value[eRFPath] << 16));
+                                         (priv->rf_reg_0value[eRFPath] << 16));
                        NewOffset = Offset - 30;
                } else if (Offset >= 16) {
-                       priv->RfReg0Value[eRFPath] |= 0x100;
-                       priv->RfReg0Value[eRFPath] &= (~0x40);
+                       priv->rf_reg_0value[eRFPath] |= 0x100;
+                       priv->rf_reg_0value[eRFPath] &= (~0x40);
                        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
                                          bMaskDWord,
-                                         (priv->RfReg0Value[eRFPath] << 16));
+                                         (priv->rf_reg_0value[eRFPath] << 16));
                        NewOffset = Offset - 15;
                } else
                        NewOffset = Offset;
@@ -179,14 +179,14 @@ static void _rtl92e_phy_rf_write(struct net_device *dev,
        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
 
        if (Offset == 0x0)
-               priv->RfReg0Value[eRFPath] = Data;
+               priv->rf_reg_0value[eRFPath] = Data;
 
        if (priv->rf_chip == RF_8256) {
                if (Offset != 0) {
-                       priv->RfReg0Value[eRFPath] &= 0xebf;
+                       priv->rf_reg_0value[eRFPath] &= 0xebf;
                        rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
                                          bMaskDWord,
-                                         (priv->RfReg0Value[eRFPath] << 16));
+                                         (priv->rf_reg_0value[eRFPath] << 16));
                }
                rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
        }
@@ -306,7 +306,7 @@ void rtl92e_config_mac(struct net_device *dev)
        u32 *pdwArray = NULL;
        struct r8192_priv *priv = rtllib_priv(dev);
 
-       if (priv->bTXPowerDataReadFromEEPORM) {
+       if (priv->tx_pwr_data_read_from_eeprom) {
                dwArrayLen = MACPHY_Array_PGLength;
                pdwArray = Rtl819XMACPHY_Array_PG;
 
@@ -1309,9 +1309,9 @@ static bool _rtl92e_set_rf_power_state(struct net_device *dev,
        u8      i = 0, QueueID = 0;
        struct rtl8192_tx_ring  *ring = NULL;
 
-       if (priv->SetRFPowerStateInProgress)
+       if (priv->set_rf_pwr_state_in_progress)
                return false;
-       priv->SetRFPowerStateInProgress = true;
+       priv->set_rf_pwr_state_in_progress = true;
 
        switch (priv->rf_chip) {
        case RF_8256:
@@ -1331,7 +1331,7 @@ static bool _rtl92e_set_rf_power_state(struct net_device *dev,
                                        netdev_err(dev,
                                                   "%s(): Failed to initialize Adapter.\n",
                                                   __func__);
-                                       priv->SetRFPowerStateInProgress = false;
+                                       priv->set_rf_pwr_state_in_progress = false;
                                        return false;
                                }
 
@@ -1438,7 +1438,7 @@ static bool _rtl92e_set_rf_power_state(struct net_device *dev,
                }
        }
 
-       priv->SetRFPowerStateInProgress = false;
+       priv->set_rf_pwr_state_in_progress = false;
        return bResult;
 }
 

diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
index 92260d0..050f043 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c
@@ -872,7 +872,7 @@ static void _rtl92e_init_priv_variable(struct net_device *dev)
        priv->rtllib->rf_off_reason = 0;
        priv->rf_change_in_progress = false;
        priv->hw_rf_off_action = 0;
-       priv->SetRFPowerStateInProgress = false;
+       priv->set_rf_pwr_state_in_progress = false;
        priv->rtllib->pwr_save_ctrl.bLeisurePs = true;
        priv->rtllib->LPSDelayCnt = 0;
        priv->rtllib->sta_sleep = LPS_IS_WAKE;

diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
index cc3e281..ad34bef 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
+++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h
@@ -444,18 +444,18 @@ struct r8192_priv {
 
        u8 nCur40MhzPrimeSC;
 
-       u32 RfReg0Value[4];
+       u32 rf_reg_0value[4];
        u8 num_total_rf_path;
        bool brfpath_rxenable[4];
 
-       bool bTXPowerDataReadFromEEPORM;
+       bool tx_pwr_data_read_from_eeprom;
 
        u16 reg_chnl_plan;
        u16 chnl_plan;
        u8 hw_rf_off_action;
 
        bool rf_change_in_progress;
-       bool SetRFPowerStateInProgress;
+       bool set_rf_pwr_state_in_progress;
        bool bdisable_nic;
 
        u8 DM_Type;