* @boot_falcon: ID of the falcon that will perform secure boot
* @managed_falcons: bitfield of falcons managed by this ACR
* @optional_falcons: bitfield of falcons we can live without
- * @start_address: virtual start address of the HS bootloader
*/
struct nvkm_acr {
const struct nvkm_acr_func *func;
enum nvkm_secboot_falcon boot_falcon;
unsigned long managed_falcons;
unsigned long optional_falcons;
- u32 start_address;
};
void *nvkm_acr_load_firmware(const struct nvkm_subdev *, const char *, size_t);
hdr = acr->hsbl_blob;
hsbl_desc = acr->hsbl_blob + hdr->header_offset;
- /* virtual start address for boot vector */
- acr->base.start_address = hsbl_desc->start_tag << 8;
-
return 0;
}
}
/**
- * acr_r352_load() - prepare HS falcon to run the specified blob, mapped
- * at GPU address offset.
+ * acr_r352_load() - prepare HS falcon to run the specified blob, mapped.
+ *
+ * Returns the start address to use, or a negative error value.
*/
static int
acr_r352_load(struct nvkm_acr *_acr, struct nvkm_secboot *sb,
nvkm_falcon_load_dmem(falcon, bl_desc, hsbl_desc->dmem_load_off,
bl_desc_size, 0);
- return 0;
+ return hsbl_desc->start_tag << 8;
}
static int
struct nvkm_subdev *subdev = &gsb->base.subdev;
struct nvkm_falcon *falcon = gsb->base.boot_falcon;
struct nvkm_vma vma;
+ u32 start_address;
int ret;
ret = nvkm_falcon_get(falcon, subdev);
/* Load the HS bootloader into the falcon's IMEM/DMEM */
ret = sb->acr->func->load(sb->acr, &gsb->base, blob, vma.offset);
- if (ret)
+ if (ret < 0)
goto end;
+ start_address = ret;
+
/* Disable interrupts as we will poll for the HALT bit */
nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false);
nvkm_falcon_wr32(falcon, 0x040, 0xdeada5a5);
/* Start the HS bootloader */
- nvkm_falcon_set_start_addr(falcon, sb->acr->start_address);
+ nvkm_falcon_set_start_addr(falcon, start_address);
nvkm_falcon_start(falcon);
ret = nvkm_falcon_wait_for_halt(falcon, 100);
if (ret)