pinctrl: tegra: Fix write barrier placement in pmx_writel
authorSowjanya Komatineni <skomatineni@nvidia.com>
Fri, 16 Aug 2019 19:41:46 +0000 (12:41 -0700)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 21 Aug 2019 07:00:16 +0000 (09:00 +0200)
pmx_writel uses writel which inserts write barrier before the
register write.

This patch has fix to replace writel with writel_relaxed followed
by a readback and memory barrier to ensure write operation is
completed for successful pinctrl change.

Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1565984527-5272-2-git-send-email-skomatineni@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/tegra/pinctrl-tegra.c

index e3a2375..5e3c001 100644 (file)
@@ -32,7 +32,9 @@ static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg)
 
 static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg)
 {
-       writel(val, pmx->regs[bank] + reg);
+       writel_relaxed(val, pmx->regs[bank] + reg);
+       /* make sure pinmux register write completed */
+       pmx_readl(pmx, bank, reg);
 }
 
 static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)