drm: vc4: 0 is a valid value for pixel_order_hvs5, so fix conditionals

vc4_plane_mode_set for HVS5 was using pixel_order unless pixel_order_hvs5
was non-zero, except 0 is a valid value for the pixel_order.

Specify pixel_order_hvs5 for all formats and remove the conditional.

Reported-by: vrazzer <teamvraz@pipmail.net>
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 9fbff67..00b2c74 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -63,11 +63,13 @@ static const struct hvs_format {
                .drm = DRM_FORMAT_RGB565,
                .hvs = HVS_PIXEL_FORMAT_RGB565,
                .pixel_order = HVS_PIXEL_ORDER_XRGB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB,
        },
        {
                .drm = DRM_FORMAT_BGR565,
                .hvs = HVS_PIXEL_FORMAT_RGB565,
                .pixel_order = HVS_PIXEL_ORDER_XBGR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR,
        },
        {
                .drm = DRM_FORMAT_ARGB1555,
@@ -85,56 +87,67 @@ static const struct hvs_format {
                .drm = DRM_FORMAT_RGB888,
                .hvs = HVS_PIXEL_FORMAT_RGB888,
                .pixel_order = HVS_PIXEL_ORDER_XRGB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB,
        },
        {
                .drm = DRM_FORMAT_BGR888,
                .hvs = HVS_PIXEL_FORMAT_RGB888,
                .pixel_order = HVS_PIXEL_ORDER_XBGR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR,
        },
        {
                .drm = DRM_FORMAT_YUV422,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
        },
        {
                .drm = DRM_FORMAT_YVU422,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
        },
        {
                .drm = DRM_FORMAT_YUV420,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
        },
        {
                .drm = DRM_FORMAT_YVU420,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
        },
        {
                .drm = DRM_FORMAT_NV12,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
        },
        {
                .drm = DRM_FORMAT_NV21,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
        },
        {
                .drm = DRM_FORMAT_NV16,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
        },
        {
                .drm = DRM_FORMAT_NV61,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
                .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB,
        },
        {
                .drm = DRM_FORMAT_P030,
                .hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
                .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
+               .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
                .hvs5_only = true,
        },
        {
@@ -1083,15 +1096,10 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
                vc4_dlist_write(vc4_state, 0xc0c0c0c0);
 
        } else {
-               u32 hvs_pixel_order = format->pixel_order;
-
-               if (format->pixel_order_hvs5)
-                       hvs_pixel_order = format->pixel_order_hvs5;
-
                /* Control word */
                vc4_dlist_write(vc4_state,
                                SCALER_CTL0_VALID |
-                               (hvs_pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+                               (format->pixel_order_hvs5 << SCALER_CTL0_ORDER_SHIFT) |
                                (hvs_format << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
                                VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) |
                                (vc4_state->is_unity ?