struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
int ret, reg;
int mask = 0xc0, enable_ctrl;
- unsigned int val;
+ u8 val;
ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
if (ret == -EINVAL)
else if (ret)
return ret;
- ret = sec_reg_read(s5m8767->iodev, reg, &val);
+ ret = sec_reg_read(s5m8767->iodev->regmap_pmic, reg, &val);
if (ret)
return ret;
if (ret)
return ret;
- return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
+ return sec_reg_update(s5m8767->iodev->regmap_pmic, reg, enable_ctrl, mask);
}
static int s5m8767_reg_disable(struct regulator_dev *rdev)
if (ret)
return ret;
- return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
+ return sec_reg_update(s5m8767->iodev->regmap_pmic, reg, ~mask, mask);
}
static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
pdata->buck2_init);
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2, buck_init);
buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
pdata->buck3_init);
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2, buck_init);
buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
pdata->buck4_init);
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2, buck_init);
for (i = 0; i < 8; i++) {
if (s5m8767->buck2_gpiodvs) {
if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
pdata->buck4_gpiodvs) {
- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2CTRL,
(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
1 << 1);
- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3CTRL,
(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
1 << 1);
- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4CTRL,
(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
1 << 1);
}
/* Initialize GPIO DVS registers */
for (i = 0; i < 8; i++) {
if (s5m8767->buck2_gpiodvs) {
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS1 + i,
s5m8767->buck2_vol[i]);
}
if (s5m8767->buck3_gpiodvs) {
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS1 + i,
s5m8767->buck3_vol[i]);
}
if (s5m8767->buck4_gpiodvs) {
- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
+ sec_reg_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS1 + i,
s5m8767->buck4_vol[i]);
}
}
if (s5m8767->buck2_ramp)
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP, 0x08, 0x08);
if (s5m8767->buck3_ramp)
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP, 0x04, 0x04);
if (s5m8767->buck4_ramp)
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP, 0x02, 0x02);
if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
|| s5m8767->buck4_ramp) {
switch (s5m8767->ramp_delay) {
case 5:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0x40, 0xf0);
break;
case 10:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0x90, 0xf0);
break;
case 25:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0xd0, 0xf0);
break;
case 50:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0xe0, 0xf0);
break;
case 100:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0xf0, 0xf0);
break;
default:
- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
+ sec_reg_update(s5m8767->iodev->regmap_pmic, S5M8767_REG_DVSRAMP,
0x90, 0xf0);
}
}
config.dev = s5m8767->dev;
config.init_data = pdata->regulators[i].initdata;
config.driver_data = s5m8767;
- config.regmap = iodev->regmap;
+ config.regmap = s5m8767->iodev->regmap_pmic;
config.of_node = pdata->regulators[i].reg_node;
rdev[i] = regulator_register(®ulators[id], &config);