arm64: dts: hisilicon: normalize the node name of the ITS devices

Change the node name of the ITS devices to match
"^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although
"interrupt-controller" is allowed, but "msi-controller" is preferred.
Otherwise, "interrupt-controller@b7000000: False schema does not allow"
will be reported by arm,gic-v3.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index bc49955..f7e3a7a 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -242,28 +242,28 @@
                      <0x0 0xfe020000 0 0x10000>;       /* GICV */
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-               its_peri: interrupt-controller@8c000000 {
+               its_peri: msi-controller@8c000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0x8c000000 0x0 0x40000>;
                };
 
-               its_m3: interrupt-controller@a3000000 {
+               its_m3: msi-controller@a3000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0xa3000000 0x0 0x40000>;
                };
 
-               its_pcie: interrupt-controller@b7000000 {
+               its_pcie: msi-controller@b7000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0xb7000000 0x0 0x40000>;
                };
 
-               its_dsa: interrupt-controller@c6000000 {
+               its_dsa: msi-controller@c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 50ceaa9..a2fba45 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -242,7 +242,7 @@
                      <0x0 0xfe020000 0 0x10000>;       /* GICV */
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-               its_dsa: interrupt-controller@c6000000 {
+               its_dsa: msi-controller@c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 4773a53..892691b 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -924,56 +924,56 @@
                      <0x0 0xfe020000 0x0 0x10000>;     /* GICV */
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-               p0_its_peri_a: interrupt-controller@4c000000 {
+               p0_its_peri_a: msi-controller@4c000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0x4c000000 0x0 0x40000>;
                };
 
-               p0_its_peri_b: interrupt-controller@6c000000 {
+               p0_its_peri_b: msi-controller@6c000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0x6c000000 0x0 0x40000>;
                };
 
-               p0_its_dsa_a: interrupt-controller@c6000000 {
+               p0_its_dsa_a: msi-controller@c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x0 0xc6000000 0x0 0x40000>;
                };
 
-               p0_its_dsa_b: interrupt-controller@8,c6000000 {
+               p0_its_dsa_b: msi-controller@8c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x8 0xc6000000 0x0 0x40000>;
                };
 
-               p1_its_peri_a: interrupt-controller@400,4c000000 {
+               p1_its_peri_a: msi-controller@4004c000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x400 0x4c000000 0x0 0x40000>;
                };
 
-               p1_its_peri_b: interrupt-controller@400,6c000000 {
+               p1_its_peri_b: msi-controller@4006c000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x400 0x6c000000 0x0 0x40000>;
                };
 
-               p1_its_dsa_a: interrupt-controller@400,c6000000 {
+               p1_its_dsa_a: msi-controller@400c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;
                        reg = <0x400 0xc6000000 0x0 0x40000>;
                };
 
-               p1_its_dsa_b: interrupt-controller@408,c6000000 {
+               p1_its_dsa_b: msi-controller@408c6000000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        #msi-cells = <1>;