gpu: host1x: Avoid trying to use GART on Tegra20

Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it to work in ways
that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to
IOMMU device registration") that bodge no longer works, but really the
GPU driver should be responsible for its own behaviour anyway. Make the
workaround explicit.

Reported-by: Jon Hunter <jonathanh@nvidia.com>
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 6748ec1e00057da7060e90813d0bb49bf11b95f4..a1f909dac89a7657c3ccf415025df22e5b4cf7fc 100644 (file)
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -1093,6 +1093,10 @@ static bool host1x_drm_wants_iommu(struct host1x_device *dev)
        struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
        struct iommu_domain *domain;
 
+       /* Our IOMMU usage policy doesn't currently play well with GART */
+       if (of_machine_is_compatible("nvidia,tegra20"))
+               return false;
+
        /*
         * If the Tegra DRM clients are backed by an IOMMU, push buffers are
         * likely to be allocated beyond the 32-bit boundary if sufficient

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 0cd3f97e7e49f2a35083dc58fec9e14170ac2bed..f60ea24db0ec8cf72f23e1e5989049ef65fb1175 100644 (file)
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -292,6 +292,10 @@ static void host1x_setup_virtualization_tables(struct host1x *host)
 
 static bool host1x_wants_iommu(struct host1x *host1x)
 {
+       /* Our IOMMU usage policy doesn't currently play well with GART */
+       if (of_machine_is_compatible("nvidia,tegra20"))
+               return false;
+
        /*
         * If we support addressing a maximum of 32 bits of physical memory
         * and if the host1x firewall is enabled, there's no need to enable