powerpc/bpf: Introduce __PPC_SH64()

Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some
of the shift and rotate instructions operating on double-words. Convert
some of the BPF instruction macros to use the same.

Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index c4ced1d..d99bd44 100644 (file)
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -306,6 +306,7 @@
 #define __PPC_WC(w)    (((w) & 0x3) << 21)
 #define __PPC_WS(w)    (((w) & 0x1f) << 11)
 #define __PPC_SH(s)    __PPC_WS(s)
+#define __PPC_SH64(s)  (__PPC_SH(s) | (((s) & 0x20) >> 4))
 #define __PPC_MB(s)    (((s) & 0x1f) << 6)
 #define __PPC_ME(s)    (((s) & 0x1f) << 1)
 #define __PPC_MB64(s)  (__PPC_MB(s) | ((s) & 0x20))

diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 89f7007..30cf03f 100644 (file)
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -157,8 +157,7 @@
 #define PPC_SRAD(d, a, s)      EMIT(PPC_INST_SRAD | ___PPC_RA(d) |           \
                                     ___PPC_RS(a) | ___PPC_RB(s))
 #define PPC_SRADI(d, a, i)     EMIT(PPC_INST_SRADI | ___PPC_RA(d) |          \
-                                    ___PPC_RS(a) | __PPC_SH(i) |             \
-                                    (((i) & 0x20) >> 4))
+                                    ___PPC_RS(a) | __PPC_SH64(i))
 #define PPC_RLWINM(d, a, i, mb, me)    EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
                                        ___PPC_RS(a) | __PPC_SH(i) |          \
                                        __PPC_MB(mb) | __PPC_ME(me))
@@ -166,11 +165,11 @@
                                        ___PPC_RS(a) | __PPC_SH(i) |          \
                                        __PPC_MB(mb) | __PPC_ME(me))
 #define PPC_RLDICL(d, a, i, mb)                EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \
-                                       ___PPC_RS(a) | __PPC_SH(i) |          \
-                                       __PPC_MB64(mb) | (((i) & 0x20) >> 4))
+                                       ___PPC_RS(a) | __PPC_SH64(i) |        \
+                                       __PPC_MB64(mb))
 #define PPC_RLDICR(d, a, i, me)                EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
-                                       ___PPC_RS(a) | __PPC_SH(i) |          \
-                                       __PPC_ME64(me) | (((i) & 0x20) >> 4))
+                                       ___PPC_RS(a) | __PPC_SH64(i) |        \
+                                       __PPC_ME64(me))
 
 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */
 #define PPC_SLWI(d, a, i)      PPC_RLWINM(d, a, i, 0, 31-(i))