Vote for min clk frequency for core clks during prepare and enable clocks
at boot sequence. Without this the controller clock runs at very low value
(9.6MHz) which is not sufficient to boot venus.
Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
static int core_clks_enable(struct venus_core *core)
{
const struct venus_resources *res = core->res;
+ const struct freq_tbl *freq_tbl = core->res->freq_tbl;
+ unsigned int freq_tbl_size = core->res->freq_tbl_size;
+ unsigned long freq;
unsigned int i;
int ret;
+ if (!freq_tbl)
+ return -EINVAL;
+
+ freq = freq_tbl[freq_tbl_size - 1].freq;
+
for (i = 0; i < res->clks_num; i++) {
+ if (IS_V6(core)) {
+ ret = clk_set_rate(core->clks[i], freq);
+ if (ret)
+ goto err;
+ }
+
ret = clk_prepare_enable(core->clks[i]);
if (ret)
goto err;