DRM_FORMAT_ARGB8888,
};
-static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
- [PRIMARY_WIN] = DRM_PLANE_TYPE_PRIMARY,
- [CURSON_WIN] = DRM_PLANE_TYPE_CURSOR,
-};
-
static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
u32 val)
{
| EXYNOS_DRM_PLANE_CAP_PIX_BLEND;
ret = exynos_plane_init(drm_dev, &ctx->planes[i],
decon_formats, ARRAY_SIZE(decon_formats),
- decon_win_types[i]);
+ WINDOWS_NR - ctx->first_win);
if (ret)
return ret;
}
DRM_FORMAT_BGRA8888,
};
-static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
- DRM_PLANE_TYPE_PRIMARY,
- DRM_PLANE_TYPE_CURSOR,
-};
-
static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc)
{
struct decon_context *ctx = to_decon(crtc);
for (i = 0; i < WINDOWS_NR; i++) {
ctx->planes[i].index = i;
ret = exynos_plane_init(drm_dev, &ctx->planes[i], decon_formats,
- ARRAY_SIZE(decon_formats), decon_win_types[i]);
+ ARRAY_SIZE(decon_formats), WINDOWS_NR);
if (ret)
return ret;
}
int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *plane,
const uint32_t *pixel_formats, int num_pixel_formats,
- enum drm_plane_type type);
+ int win_count);
/*
* Exynos drm crtc ops
};
MODULE_DEVICE_TABLE(of, fimd_driver_dt_match);
-static const enum drm_plane_type fimd_win_types[WINDOWS_NR] = {
- DRM_PLANE_TYPE_PRIMARY,
- DRM_PLANE_TYPE_OVERLAY,
- DRM_PLANE_TYPE_OVERLAY,
- DRM_PLANE_TYPE_OVERLAY,
- DRM_PLANE_TYPE_CURSOR,
-};
-
static const uint32_t fimd_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_XRGB1555,
| EXYNOS_DRM_PLANE_CAP_WIN_BLEND
| EXYNOS_DRM_PLANE_CAP_PIX_BLEND;
ret = exynos_plane_init(drm_dev, &ctx->planes[i], fimd_formats,
- ARRAY_SIZE(fimd_formats), fimd_win_types[i]);
+ ARRAY_SIZE(fimd_formats), WINDOWS_NR);
if (ret)
return ret;
}
drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1);
}
+static inline enum drm_plane_type exynos_plane_type(int index, int count)
+{
+ if (count && !index)
+ return DRM_PLANE_TYPE_PRIMARY;
+ if (index == count - 1)
+ return DRM_PLANE_TYPE_CURSOR;
+ return DRM_PLANE_TYPE_OVERLAY;
+}
+
int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *plane,
const uint32_t *pixel_formats, int num_pixel_formats,
- enum drm_plane_type type)
+ int win_count)
{
int err;
unsigned int supported_modes = BIT(DRM_MODE_BLEND_PIXEL_NONE) |
struct drm_plane *bplane = &plane->base;
err = drm_universal_plane_init(dev, bplane,
- 1 << dev->mode_config.num_crtc,
- &exynos_plane_funcs,
- pixel_formats,
- num_pixel_formats,
- NULL, type, NULL);
+ 1 << dev->mode_config.num_crtc,
+ &exynos_plane_funcs, pixel_formats, num_pixel_formats,NULL,
+ exynos_plane_type(plane->index, win_count), NULL);
if (err) {
DRM_ERROR("failed to initialize plane\n");
return err;
DRM_FORMAT_NV12,
};
-static const enum drm_plane_type vidi_win_types[WINDOWS_NR] = {
- DRM_PLANE_TYPE_PRIMARY,
- DRM_PLANE_TYPE_OVERLAY,
- DRM_PLANE_TYPE_CURSOR,
-};
-
static int vidi_enable_vblank(struct exynos_drm_crtc *crtc)
{
struct vidi_context *ctx = to_vidi(crtc);
for (i = 0; i < WINDOWS_NR; i++) {
ret = exynos_plane_init(drm_dev, &ctx->planes[i], formats,
- ARRAY_SIZE(formats), vidi_win_types[i]);
+ ARRAY_SIZE(formats), WINDOWS_NR);
if (ret)
return ret;
}
struct drm_device *drm_dev = data;
unsigned int i;
int ret;
- static enum drm_plane_type types[] = { DRM_PLANE_TYPE_PRIMARY,
- DRM_PLANE_TYPE_CURSOR, DRM_PLANE_TYPE_OVERLAY };
ret = mixer_initialize(ctx, drm_dev);
if (ret)
EXYNOS_DRM_PLANE_CAP_PIX_BLEND |
EXYNOS_DRM_PLANE_CAP_WIN_BLEND;
ret = exynos_plane_init(drm_dev, &ctx->planes[i], mixer_formats,
- ARRAY_SIZE(mixer_formats), types[i]);
+ ARRAY_SIZE(mixer_formats), VP_DEFAULT_WIN);
if (ret)
return ret;
}
EXYNOS_DRM_PLANE_CAP_TILE |
EXYNOS_DRM_PLANE_CAP_WIN_BLEND;
ret = exynos_plane_init(drm_dev, &ctx->planes[i], vp_formats,
- ARRAY_SIZE(vp_formats), types[i]);
+ ARRAY_SIZE(vp_formats), VP_DEFAULT_WIN);
if (ret)
return ret;
}