INPUTS-y += init_sp_bss_offset_check
endif
-ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
-INPUTS-y += u-boot-with-dtb.bin
-endif
-
ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy)
# Binman image dependencies
ifeq ($(CONFIG_ARM64),y)
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
$(call if_changed,cat)
+ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-dtb.bin FORCE
$(call if_changed,copy)
-else
+endif
+
+else ifneq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
u-boot.bin: u-boot-nodtb.bin FORCE
$(call if_changed,copy)
endif
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
- $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if $(CONFIG_OF_EMBED),,-R .bootpg -R .resetvec))
+ $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if $(CONFIG_OF_SEPARATE),-R .bootpg -R .resetvec))
binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
-R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -A $(ARCH) -T pblimage
-ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
-UBOOT_BIN := u-boot-with-dtb.bin
-else
UBOOT_BIN := u-boot.bin
-endif
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
endif
-ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
-u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \
- $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin) FORCE
+ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR)$(CONFIG_OF_SEPARATE),yy)
+u-boot.bin: u-boot-nodtb.bin u-boot.dtb u-boot-br.bin FORCE
$(call if_changed,binman)
-ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y)
OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec
u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
-endif
quiet_cmd_ldr = LD $@
cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
ifeq ($(ARCH),arm)
UBOOT_BINLOAD := u-boot.img
else
-ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
-UBOOT_BINLOAD := u-boot-with-dtb.bin
-else
UBOOT_BINLOAD := u-boot.bin
endif
-endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
--gap-fill=0xff
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_IFC_BE
- select BINMAN if OF_SEPARATE
+ select BINMAN if MPC85XX_HAVE_RESET_VECTOR && OF_SEPARATE
imply CMD_HASH
imply CMD_IRQ
imply USB_EHCI_HCD if USB
config FSL_PREPBL_ESDHC_BOOT_SECTOR
bool "Generate QorIQ pre-PBL eSDHC boot sector"
depends on MPC85xx
- depends on SYS_EXTRA_OPTIONS = SDCARD
+ depends on SDCARD
help
With this option final image would have prepended QorIQ pre-PBL eSDHC
boot sector suitable for SD card images. This boot sector instruct
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
- . = ALIGN(8);
+ . = ALIGN(4);
__init_begin = .;
__init_end = .;
_end = .;
+
+#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
+#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS)
+ mmc_u_boot_offs = .;
+#endif
+#endif
+
#ifdef CONFIG_SPL_SKIP_RELOCATE
. = ALIGN(4);
__bss_start = .;
.resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : {
KEEP(*(.resetvec))
} = 0xffff
+#if defined(CONFIG_SDCARD) && !defined(CONFIG_SYS_MMC_U_BOOT_OFFS)
+ mmc_u_boot_offs = .;
+#endif
#endif
#ifndef CONFIG_SPL_SKIP_RELOCATE
};
binman {
- filename = "u-boot-with-dtb.bin";
+ filename = "u-boot.bin";
skip-at-start = <CONFIG_SYS_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
#include <config.h>
+#if defined(CONFIG_MPC85XX_HAVE_RESET_VECTOR) && defined(CONFIG_OF_SEPARATE)
+
/ {
binman {
- filename = "u-boot-with-dtb.bin";
+ filename = "u-boot.bin";
skip-at-start = <CONFIG_SYS_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
};
u-boot-dtb-with-ucode {
-#ifdef CONFIG_MPC85xx
align = <4>;
-#endif
};
-#ifdef CONFIG_MPC85XX_HAVE_RESET_VECTOR
#ifndef CONFIG_RESET_VECTOR_ADDRESS
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#endif
powerpc-mpc85xx-bootpg-resetvec {
offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>;
};
-#endif
};
};
+
+#endif
CONFIG_RESET_VECTOR_ADDRESS - 0xffc
If device tree support is enabled in defconfig,
-1. use 'u-boot-with-dtb.bin' for NOR boot.
+1. use 'u-boot.bin' for NOR boot.
2. use 'u-boot-with-spl.bin' for other boot.
3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
CONFIG_RESET_VECTOR_ADDRESS - 0xffc
-If device tree support is enabled in defconfig, use 'u-boot-with-dtb.bin'
-instead of u-boot.bin for all boot.
-
CPLD command
============
The CPLD is used to control the power sequence and some serdes lane
config_reset_vector_address - 0xffc
if device tree support is enabled in defconfig,
-1. use 'u-boot-with-dtb.bin' for nor boot.
+1. use 'u-boot.bin' for nor boot.
2. use 'u-boot-with-spl-pbl.bin' for other boot.
2-stage NAND/SPI/SD boot loader
CONFIG_RESET_VECTOR_ADDRESS - 0xffc
If device tree support is enabled in defconfig,
-1. use 'u-boot-with-dtb.bin' for NOR boot.
+1. use 'u-boot.bin' for NOR boot.
2. use 'u-boot-with-spl-pbl.bin' for other boot.
CONFIG_RESET_VECTOR_ADDRESS - 0xffc
If device tree support is enabled in defconfig,
-1. use 'u-boot-with-dtb.bin' for NOR boot.
+1. use 'u-boot.bin' for NOR boot.
2. use 'u-boot-with-spl-pbl.bin' for other boot.
CONFIG_RESET_VECTOR_ADDRESS - 0xffc
If device tree support is enabled in defconfig,
-1. use 'u-boot-with-dtb.bin' for NOR boot.
+1. use 'u-boot.bin' for NOR boot.
2. use 'u-boot-with-spl-pbl.bin' for other boot.
#include <mmc.h>
#include <malloc.h>
+#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS
+extern uchar mmc_u_boot_offs[];
+#endif
+
/*
* The environment variables are written to just after the u-boot image
* on SDCard, so we must read the MBR to get the start address and code
{
__attribute__((noreturn)) void (*uboot)(void);
uint blk_start, blk_cnt, err;
-#ifndef CONFIG_FSL_CORENET
uchar *tmp_buf;
u32 blklen;
u32 blk_off;
+#ifndef CONFIG_FSL_CORENET
uchar val;
#ifndef CONFIG_SPL_FSL_PBL
u32 val32;
hang();
}
-#ifdef CONFIG_FSL_CORENET
- offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
-#else
blklen = mmc->read_bl_len;
if (blklen < 512)
blklen = 512;
hang();
}
+#ifdef CONFIG_FSL_CORENET
+ offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
+#else
sector = 0;
again:
memset(tmp_buf, 0, blklen);
val = *(tmp_buf + blk_off + ESDHC_BOOT_IMAGE_ADDR + i);
offset = (offset << 8) + val;
}
+#ifndef CONFIG_SYS_MMC_U_BOOT_OFFS
+ offset += (ulong)&mmc_u_boot_offs - CONFIG_SPL_TEXT_BASE;
+#else
offset += CONFIG_SYS_MMC_U_BOOT_OFFS;
#endif
+#endif
/*
* Load U-Boot image from mmc into RAM
*/
code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
- blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
- blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
+ blk_start = offset / mmc->read_bl_len;
+ blk_off = offset % mmc->read_bl_len;
+ blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
+ if (blk_off) {
+ err = mmc->block_dev.block_read(&mmc->block_dev,
+ blk_start, 1, tmp_buf);
+ if (err != 1) {
+ puts("spl: mmc read failed!!\n");
+ hang();
+ }
+ blk_start++;
+ }
err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
- (uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
+ (uchar *)CONFIG_SYS_MMC_U_BOOT_DST +
+ (blk_off ? (mmc->read_bl_len - blk_off) : 0));
if (err != blk_cnt) {
puts("spl: mmc read failed!!\n");
-#ifndef CONFIG_FSL_CORENET
free(tmp_buf);
-#endif
hang();
}
+ /*
+ * SDHC DMA may erase bytes at dst + bl_len - blk_off - 8
+ * due to unaligned access. So copy leading bytes from tmp_buf
+ * after SDHC DMA transfer.
+ */
+ if (blk_off)
+ memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,
+ tmp_buf + blk_off, mmc->read_bl_len - blk_off);
/*
* Clean d-cache and invalidate i-cache, to