aco: Assert that operands have the same byte offset when reassigning split vectors
authorGeorg Lehmann <dadschoorse@gmail.com>
Wed, 3 May 2023 09:24:19 +0000 (11:24 +0200)
committerMarge Bot <emma+marge@anholt.net>
Thu, 11 May 2023 10:26:24 +0000 (10:26 +0000)
This can not happen because the post-RA optimizer doesn't support sub dword
writes at the moment, but everytime I look at this I wonder if there might
be a bug here.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22821>

src/amd/compiler/aco_optimizer_postRA.cpp

index a05f216..b9dd52a 100644 (file)
@@ -657,6 +657,11 @@ try_reassign_split_vector(pr_opt_ctx& ctx, aco_ptr<Instruction>& instr)
          if (op.regClass() == s2 && reg.reg() % 2 != 0)
             break;
 
+         /* Sub dword operands might need updates to SDWA/opsel,
+          * but we only track full register writes at the moment.
+          */
+         assert(op.physReg().byte() == reg.byte());
+
          /* If there is only one use (left), recolor the split_vector definition */
          if (ctx.uses[op.tempId()] == 1)
             def.setFixed(reg);