hdmirx: fix hdmirx compatibility issue [1/1]
authoryicheng shen <yicheng.shen@amlogic.com>
Wed, 20 Feb 2019 08:21:33 +0000 (03:21 -0500)
committerTao Zeng <tao.zeng@amlogic.com>
Wed, 27 Feb 2019 05:55:35 +0000 (21:55 -0800)
PD#SWPL-4261

Problem:
1.black screen(timing info error);
2.74.5m not stable
3.nvidia 4k420 10bit noisy dot

Solution:
1.update timing stable judgement logic;
2.update phy setting;
3.add 340-525m bandwidth phy setting

Verify:
TL1

Change-Id: I3e47361af70cfff67a84daa8f768f3e0da3bce48
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c

index b2806bb..6b9c84c 100644 (file)
@@ -41,7 +41,7 @@
  *
  *
  */
-#define RX_VER1 "ver.2019/01/28"
+#define RX_VER1 "ver.2019/02/13"
 /*
  *
  *
index db1d4c5..4aeff24 100644 (file)
@@ -3255,10 +3255,12 @@ uint32_t aml_cable_clk_band(uint32_t cableclk,
                bw = phy_frq_band_1;
        else if (cab_clk < (155*MHz))
                bw = phy_frq_band_2;
-       else if (cab_clk < (300*MHz))
+       else if (cab_clk < (340*MHz))
                bw = phy_frq_band_3;
-       else if (cab_clk < (600*MHz))
+       else if (cab_clk < (525*MHz))
                bw = phy_frq_band_4;
+       else if (cab_clk < (600*MHz))
+               bw = phy_frq_band_5;
        else {
                bw = phy_frq_band_2;
                rx_pr("bw err,clk=%d\n", cableclk/MHz);
@@ -3323,7 +3325,10 @@ static const uint32_t phy_misci[][4] = {
        {       /* 155~340M */
                0x3003707f,     0x00000080,     0x02218000,     0x00000010,
        },
-       {       /* 340~600M */
+       {       /* 340~525M */
+               0x3003707f,     0x007f0080,     0x02218000,     0x00000010,
+       },
+       {       /* 525~600M */
                0x3003707f,     0x007f0080,     0x02218000,     0x00000010,
        },
 };
@@ -3342,7 +3347,10 @@ static const uint32_t phy_dcha[][3] = {
        {       /* 155~340M */
                0x000002a2,     0x0800c202, 0x0100cc31,
        },
-       {       /* 340~600M */
+       {       /* 340~525M */
+               0x000002a2,     0x0700003c, 0x1d00cc31,
+       },
+       {       /* 525~600M */
                0x000002a2,     0x0700003c, 0x1d00cc31,
        },
 };
@@ -3351,39 +3359,45 @@ static const uint32_t phy_dcha[][3] = {
 static const uint32_t phy_dchd_1[][3] = {
                /*  0xe5                0xe6            0xe7 */
        {       /* 24~45M */
-               0x002e712a,     0x1e062620,     0x00018000,
+               0x002e712a,     0x1e022220,     0x00018000,
        },
        {       /* 45~74.5M */
-               0x002e712a, 0x1e062620, 0x00018000,
+               0x002e714a, 0x1e022220, 0x00018000,
        },
        {       /* 77~155M */
-               0x002c714a,     0x1e062620, 0x00018000,
+               0x002c715a,     0x1e022220, 0x00018000,
        },
        {       /* 155~340M */
-               0x002c714a,     0x1e062620, 0x00018000,
+               0x002c715a,     0x1e022220, 0x00018000,
        },
-       {       /* 340~600M */
-               0x002c714a,     0x1e051650, 0x00018000,
+       {       /* 340~525M */
+               0x002c715a,     0x1e012330, 0x0001a000,
+       },
+       {       /* 525~600M */
+               0x002c715a,     0x1e022220, 0x00018000,
        },
 };
 
 /* long cable */
 static const uint32_t phy_dchd_2[][3] = {
-               /*  0xe5                0xe6            0xe7 */
+               /*      0xe5            0xe6            0xe7 */
        {       /* 24~45M */
-               0x002e712a,     0x1e022220,     0x00018000,
+               0x002e712a, 0x1e062620, 0x00018000,
        },
        {       /* 45~74.5M */
-               0x002e712a, 0x1e022220, 0x00018000,
+               0x002e714a, 0x1e062620, 0x00018000,
        },
        {       /* 77~155M */
-               0x002c715a,     0x1e022220, 0x00018000,
+               0x002c714a, 0x1e062620, 0x00018000,
        },
        {       /* 155~340M */
-               0x002c715a,     0x1e022220, 0x00018000,
+               0x002c714a, 0x1e062620, 0x00018000,
        },
-       {       /* 340~600M */
-               0x002c715a,     0x1e022220, 0x00018000,
+       {       /* 340~525M */
+               0x002c714a, 0x1e051650, 0x00018000,
+       },
+       {       /* 525~600M */
+               0x002c714a, 0x1e051650, 0x00018000,
        },
 };
 
@@ -3394,7 +3408,7 @@ static const uint32_t phy_dchd_3[][3] = {
                0x002e712a,     0x1e022220,     0x00018000,
        },
        {       /* 45~74.5M */
-               0x002e712a, 0x1e022220, 0x00018000,
+               0x002e714a, 0x1e022220, 0x00018000,
        },
        {       /* 77~155M */
                0x002c714a,     0x1e022220, 0x00018000,
@@ -3402,7 +3416,10 @@ static const uint32_t phy_dchd_3[][3] = {
        {       /* 155~340M */
                0x002c714a,     0x1e022220, 0x00018000,
        },
-       {       /* 340~600M */
+       {       /* 340~525M */
+               0x002c714a,     0x1e012330, 0x0001a000,
+       },
+       {       /* 525~600M */
                0x002c714a,     0x1e022220, 0x00018000,
        },
 };
@@ -3414,7 +3431,7 @@ static const uint32_t phy_dchd_4[][3] = {
                0x002e712a,     0x1e062620,     0x00018000,
        },
        {       /* 45~74.5M */
-               0x002e712a, 0x1e062620, 0x00018000,
+               0x002e714a, 0x1e062620, 0x00018000,
        },
        {       /* 77~155M */
                0x002c715a,     0x1e062620, 0x00018000,
@@ -3422,7 +3439,10 @@ static const uint32_t phy_dchd_4[][3] = {
        {       /* 155~340M */
                0x002c715a,     0x1e062620, 0x00018000,
        },
-       {       /* 340~600M */
+       {       /* 340~525M */
+               0x002c715a,     0x1e051650, 0x00018000,
+       },
+       {       /* 525~600M */
                0x002c715a,     0x1e051650, 0x00018000,
        },
 };
index e7b7b68..e849cb5 100644 (file)
@@ -1239,8 +1239,9 @@ enum phy_frq_band {
        phy_frq_band_0 = 0,     /*45Mhz*/
        phy_frq_band_1,         /*77Mhz*/
        phy_frq_band_2,         /*155Mhz*/
-       phy_frq_band_3,         /*300Mhz*/
-       phy_frq_band_4,         /*600Mhz*/
+       phy_frq_band_3,         /*340Mhz*/
+       phy_frq_band_4,         /*525Mhz*/
+       phy_frq_band_5,         /*600Mhz*/
        phy_frq_null = 0xf,
 };
 
index b2368a9..f7fba04 100644 (file)
@@ -697,7 +697,6 @@ static const struct freq_ref_s freq_ref[] = {
 
        /* for AG-506 */
        {0, 0,  0,      720,    483,    HDMI_480p60},
-       {0, 0,  0,      0,              0,              HDMI_UNKNOWN}
 };
 
 static bool fmt_vic_abnormal(void)
@@ -706,11 +705,12 @@ static bool fmt_vic_abnormal(void)
         * timing match, but TX send normal VIC, then
         * abnormal format is detected.
         */
-       if (((rx.pre.sw_vic == HDMI_UNKNOWN) ||
-               (rx.pre.sw_vic == HDMI_UNSUPPORT)) &&
-               (rx.pre.hw_vic != HDMI_UNKNOWN))
+       if ((rx.pre.sw_vic == HDMI_UNKNOWN) ||
+               (rx.pre.sw_vic == HDMI_UNSUPPORT)) {
+               if (log_level & VIDEO_LOG)
+                       rx_pr("fmt_vic_abnormal\n");
                return true;
-       else
+       else
                return false;
 }
 
@@ -2564,6 +2564,7 @@ static void dump_video_status(void)
        rx_pr("frame_rate %d\n", rx.cur.frame_rate);
        rx_pr("fmt=0x%x,", hdmirx_hw_get_fmt());
        rx_pr("hw_vic %d,", rx.cur.hw_vic);
+       rx_pr("sw_vic %d,", rx.pre.sw_vic);
        rx_pr("rx.no_signal=%d,rx.state=%d,",
                        rx.no_signal, rx.state);
        rx_pr("skip frame=%d\n", rx.skip);