This patch contains update for mpi headers 1.5.9.
Signed-off-by: Eric Moore <Eric.Moore@lsil.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2005 LSI Logic Corporation.
*
*
* Name: mpi.h
* Title: MPI Message independent structures and definitions
* Creation Date: July 27, 2000
*
- * mpi.h Version: 01.05.xx
+ * mpi.h Version: 01.05.07
*
* Version History
* ---------------
* obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
* 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
* 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
+ * 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
+ * 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
+ * and MPI_FUNCTION_DIAG_RELEASE.
+ * Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
+ * Bumped MPI_HEADER_VERSION_UNIT value.
+ * 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
+ * Added codes for Inband.
+ * 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
+ * Added define for offset of High Priority Request Queue.
+ * Added new function codes and new IOCStatus codes.
+ * Added a IOCLogInfo type of SAS.
+ * 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
+ * 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
+ * 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
+ * 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
+ * TargetAssistExtended requests.
+ * Removed EEDP IOCStatus codes.
* --------------------------------------------------------------------------
*/
/* Note: The major versions of 0xe0 through 0xff are reserved */
/* versioning for this MPI header set */
-#define MPI_HEADER_VERSION_UNIT (0x00)
+#define MPI_HEADER_VERSION_UNIT (0x09)
#define MPI_HEADER_VERSION_DEV (0x00)
#define MPI_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI_HEADER_VERSION_UNIT_SHIFT (8)
*
*****************************************************************************/
-/* S y s t e m D o o r b e l l */
+/*
+ * Defines for working with the System Doorbell register.
+ * Values for doorbell function codes are included in the section that defines
+ * all the function codes (further on in this file).
+ */
#define MPI_DOORBELL_OFFSET (0x00000000)
#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
+#define MPI_DOORBELL_FUNCTION_SPECIFIC_MASK (0x0000FFFF)
+
+/* values for Host Buffer Access Control doorbell function */
+#define MPI_DB_HPBAC_VALUE_MASK (0x0000F000)
+#define MPI_DB_HPBAC_ENABLE_ACCESS (0x01)
+#define MPI_DB_HPBAC_DISABLE_ACCESS (0x02)
+#define MPI_DB_HPBAC_FREE_BUFFER (0x03)
#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI_FUNCTION_SMP_PASSTHROUGH (0x1A)
#define MPI_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
+#define MPI_FUNCTION_SATA_PASSTHROUGH (0x1C)
-#define MPI_DIAG_BUFFER_POST (0x1D)
-#define MPI_DIAG_RELEASE (0x1E)
-
-#define MPI_FUNCTION_SCSI_IO_32 (0x1F)
+#define MPI_FUNCTION_DIAG_BUFFER_POST (0x1D)
+#define MPI_FUNCTION_DIAG_RELEASE (0x1E)
#define MPI_FUNCTION_LAN_SEND (0x20)
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
#define MPI_FUNCTION_LAN_RESET (0x22)
+#define MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24)
+#define MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25)
+
#define MPI_FUNCTION_INBAND_BUFFER_POST (0x28)
#define MPI_FUNCTION_INBAND_SEND (0x29)
#define MPI_FUNCTION_INBAND_RSP (0x2A)
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
#define MPI_FUNCTION_HANDSHAKE (0x42)
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
+#define MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL (0x44)
/* standard version format */
U32 Address32;
U64 Address64;
}u;
-} SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t,
- SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION;
+} SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION,
+ SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t;
/****************************************************************************/
/* Chain element structures */
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************/
-/* For use by SCSI Initiator and SCSI Target end-to-end data protection */
-/****************************************************************************/
-
-#define MPI_IOCSTATUS_EEDP_CRC_ERROR (0x004D)
-#define MPI_IOCSTATUS_EEDP_LBA_TAG_ERROR (0x004E)
-#define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
-
-
-/****************************************************************************/
-/* SCSI (SPI & FCP) target values */
+/* SCSI Target values */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
-#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete */
+#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete name */
#define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
+#define MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
+#define MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
+#define MPI_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
/****************************************************************************/
/* Additional FCP target values (obsolete) */
/****************************************************************************/
#define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
+#define MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
/****************************************************************************/
/* Inband values */
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2005 LSI Logic Corporation.
*
*
* Name: mpi_cnfg.h
* Title: MPI Config message, structures, and Pages
* Creation Date: July 27, 2000
*
- * mpi_cnfg.h Version: 01.05.xx
+ * mpi_cnfg.h Version: 01.05.08
*
* Version History
* ---------------
* In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
* with ADISCHardALPA.
* Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
+ * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
+ * fields and related defines to CONFIG_PAGE_FC_PORT_1.
+ * Added define for
+ * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
+ * Added new fields to the substructures of
+ * CONFIG_PAGE_FC_PORT_10.
+ * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
+ * CONFIG_PAGE_SCSI_DEVICE_0, and
+ * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
+ * these pages.
+ * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
+ * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
+ * pages.
+ * Added a new structure for extended config page header.
+ * Added new extended config pages types and structures for
+ * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
+ * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
+ * to add a Flags field.
+ * Two new Manufacturing config pages (5 and 6).
+ * Two new bits defined for IO Unit Page 1 Flags field.
+ * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
+ * to specify the BIOS boot device.
+ * Four new Flags bits defined for IO Unit Page 2.
+ * Added IO Unit Page 4.
+ * Added EEDP Flags settings to IOC Page 1.
+ * Added new BIOS Page 1 config page.
+ * 10-05-04 01.05.02 Added define for
+ * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
+ * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
+ * associated defines.
+ * Added more defines for SAS IO Unit Page 0
+ * DiscoveryStatus field.
+ * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
+ * and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
+ * Added defines for Physical Mapping Modes to SAS IO Unit
+ * Page 2.
+ * Added define for
+ * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
+ * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
+ * Added defines for MaxTargetSpinUp to BIOS Page 1.
+ * Added 5 new ControlFlags defines for SAS IO Unit
+ * Page 1.
+ * Added MaxNumPhysicalMappedIDs field to SAS IO Unit
+ * Page 2.
+ * Added AccessStatus field to SAS Device Page 0 and added
+ * new Flags bits for supported SATA features.
+ * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
+ * Volume Page 1, and RAID Physical Disk Page 1.
+ * Replaced IO Unit Page 1 BootTargetID,BootBus, and
+ * BootAdapterNum with reserved field.
+ * Added DataScrubRate and ResyncRate to RAID Volume
+ * Page 0.
+ * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
+ * define.
+ * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
+ * Flags field.
+ * Added Auto Port Config flag define for SAS IOUNIT
+ * Page 1 ControlFlags.
+ * Added Disabled bad Phy define to Expander Page 1
+ * Discovery Info field.
+ * Added SAS/SATA device support to SAS IOUnit Page 1
+ * ControlFlags.
+ * Added Unsupported device to SAS Dev Page 0 Flags field
+ * Added disable use SATA Hash Address for SAS IOUNIT
+ * page 1 in ControlFields.
+ * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
+ * Manufacturing Page 4.
+ * Added new defines for BIOS Page 1 IOCSettings field.
+ * Added ExtDiskIdentifier field to RAID Physical Disk
+ * Page 0.
+ * Added new defines for SAS IO Unit Page 1 ControlFlags
+ * and to SAS Device Page 0 Flags to control SATA devices.
+ * Added defines and structures for the new Log Page 0, a
+ * new type of configuration page.
+ * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
+ * Added WWID field to RAID Volume Page 1.
+ * Added PhysicalPort field to SAS Expander pages 0 and 1.
+ * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
+ * Added Enclosure/Slot boot device format to BIOS Page 2.
+ * New status value for RAID Volume Page 0 VolumeStatus
+ * (VolumeState subfield).
+ * New value for RAID Physical Page 0 InactiveStatus.
+ * Added Inactive Volume Member flag RAID Physical Disk
+ * Page 0 PhysDiskStatus field.
+ * New physical mapping mode in SAS IO Unit Page 2.
+ * Added CONFIG_PAGE_SAS_ENCLOSURE_0.
+ * Added Slot and Enclosure fields to SAS Device Page 0.
* --------------------------------------------------------------------------
*/
U8 PageLength; /* 01h */
U8 PageNumber; /* 02h */
U8 PageType; /* 03h */
-} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
+} CONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
typedef union _CONFIG_PAGE_HEADER_UNION
U16 Word16[2];
U32 Word32;
} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
- fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
+ CONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
typedef struct _CONFIG_EXTENDED_PAGE_HEADER
{
U16 ExtPageLength; /* 04h */
U8 ExtPageType; /* 06h */
U8 Reserved2; /* 07h */
-} fCONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
+} CONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
+#define MPI_CONFIG_EXTPAGETYPE_LOG (0x14)
+#define MPI_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
/****************************************************************************
****************************************************************************/
#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000)
+#define MPI_SCSI_DEVICE_FORM_BUS_TID (0x00000000)
#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
+#define MPI_SCSI_DEVICE_FORM_TARGET_MODE (0x10000000)
+#define MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT (0)
+#define MPI_SCSI_DEVICE_TM_BUS_MASK (0x0000FF00)
+#define MPI_SCSI_DEVICE_TM_BUS_SHIFT (8)
+#define MPI_SCSI_DEVICE_TM_INIT_ID_MASK (0x00FF0000)
+#define MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT (16)
#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
+#define MPI_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_EXPAND_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
+#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM (0x00000001)
+#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE (0x00000002)
+#define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE (0)
+#define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY (0x00FF0000)
+#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY (16)
+#define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE (0)
+#define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE (0)
+
#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
-#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x00FF0000)
-#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (16)
-#define MPI_SAS_PHY_PGAD_DEVHANDLE_MASK (0x0000FFFF)
-#define MPI_SAS_PHY_PGAD_DEVHANDLE_SHIFT (0)
+#define MPI_SAS_PHY_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_PHY_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x0)
+#define MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x1)
+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF)
+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (0)
+#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF)
+#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT (0)
+
+#define MPI_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_ENCLOS_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
+#define MPI_SAS_ENCLOS_PGAD_FORM_HANDLE (0x00000001)
+#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT (0)
+#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT (0)
+
/****************************************************************************
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2[8]; /* 0Ch */
- fCONFIG_PAGE_HEADER Header; /* 14h */
+ CONFIG_PAGE_HEADER Header; /* 14h */
U32 PageAddress; /* 18h */
SGE_IO_UNION PageBufferSGE; /* 1Ch */
} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
U8 Reserved2[2]; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
- fCONFIG_PAGE_HEADER Header; /* 14h */
+ CONFIG_PAGE_HEADER Header; /* 14h */
} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
ConfigReply_t, MPI_POINTER pConfigReply_t;
#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
+#define MPI_MANUFACTPAGE_DEVICEID_FC939X (0x0642)
+#define MPI_MANUFACTPAGE_DEVICEID_FC949X (0x0640)
/* SCSI */
#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
/* SAS */
#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
+#define MPI_MANUFACTPAGE_DEVID_SAS1064A (0x005C)
+#define MPI_MANUFACTPAGE_DEVID_SAS1064E (0x0056)
+#define MPI_MANUFACTPAGE_DEVID_SAS1066 (0x005E)
+#define MPI_MANUFACTPAGE_DEVID_SAS1066E (0x005A)
+#define MPI_MANUFACTPAGE_DEVID_SAS1068 (0x0054)
+#define MPI_MANUFACTPAGE_DEVID_SAS1068E (0x0058)
+#define MPI_MANUFACTPAGE_DEVID_SAS1078 (0x0060)
typedef struct _CONFIG_PAGE_MANUFACTURING_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 ChipName[16]; /* 04h */
U8 ChipRevision[8]; /* 14h */
U8 BoardName[16]; /* 1Ch */
U8 BoardAssembly[16]; /* 2Ch */
U8 BoardTracerNumber[16]; /* 3Ch */
-} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
+} CONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 VPD[256]; /* 04h */
-} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
+} CONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
MPI_CHIP_REVISION_ID ChipId; /* 04h */
U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 08h */
-} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
+} CONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_3
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
MPI_CHIP_REVISION_ID ChipId; /* 04h */
U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];/* 08h */
-} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
+} CONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_4
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 04h */
U8 InfoOffset0; /* 08h */
U8 InfoSize0; /* 09h */
U32 ISVolumeSettings; /* 48h */
U32 IMEVolumeSettings; /* 4Ch */
U32 IMVolumeSettings; /* 50h */
-} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
+ U32 Reserved3; /* 54h */
+ U32 Reserved4; /* 58h */
+ U8 ISDataScrubRate; /* 5Ch */
+ U8 ISResyncRate; /* 5Dh */
+ U16 Reserved5; /* 5Eh */
+ U8 IMEDataScrubRate; /* 60h */
+ U8 IMEResyncRate; /* 61h */
+ U16 Reserved6; /* 62h */
+ U8 IMDataScrubRate; /* 64h */
+ U8 IMResyncRate; /* 65h */
+ U16 Reserved7; /* 66h */
+ U32 Reserved8; /* 68h */
+ U32 Reserved9; /* 6Ch */
+} CONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
-#define MPI_MANUFACTURING4_PAGEVERSION (0x01)
+#define MPI_MANUFACTURING4_PAGEVERSION (0x02)
/* defines for the Flags field */
#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
typedef struct _CONFIG_PAGE_MANUFACTURING_5
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U64 BaseWWID; /* 04h */
-} fCONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
+ U8 Flags; /* 0Ch */
+ U8 Reserved1; /* 0Dh */
+ U16 Reserved2; /* 0Eh */
+} CONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
-#define MPI_MANUFACTURING5_PAGEVERSION (0x00)
+#define MPI_MANUFACTURING5_PAGEVERSION (0x01)
+
+/* defines for the Flags field */
+#define MPI_MANPAGE5_TWO_WWID_PER_PHY (0x01)
typedef struct _CONFIG_PAGE_MANUFACTURING_6
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 ProductSpecificInfo;/* 04h */
-} fCONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
+} CONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IO_UNIT_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U64 UniqueValue; /* 04h */
-} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
+} CONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IO_UNIT_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Flags; /* 04h */
-} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
+} CONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
#define MPI_IOUNITPAGE1_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_IO_UNIT_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Flags; /* 04h */
U32 BiosVersion; /* 08h */
MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
-} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
+ U32 Reserved1; /* 1Ch */
+} CONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
-#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
+#define MPI_IOUNITPAGE2_PAGEVERSION (0x02)
#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
typedef struct _CONFIG_PAGE_IO_UNIT_3
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 GPIOCount; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX]; /* 08h */
-} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
+} CONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
+typedef struct _CONFIG_PAGE_IO_UNIT_4
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 04h */
+ SGE_SIMPLE_UNION FWImageSGE; /* 08h */
+} CONFIG_PAGE_IO_UNIT_4, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_4,
+ IOUnitPage4_t, MPI_POINTER pIOUnitPage4_t;
+
+#define MPI_IOUNITPAGE4_PAGEVERSION (0x00)
+
+
/****************************************************************************
* IOC Config Pages
****************************************************************************/
typedef struct _CONFIG_PAGE_IOC_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 TotalNVStore; /* 04h */
U32 FreeNVStore; /* 08h */
U16 VendorID; /* 0Ch */
U32 ClassCode; /* 14h */
U16 SubsystemVendorID; /* 18h */
U16 SubsystemID; /* 1Ah */
-} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
+} CONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
IOCPage0_t, MPI_POINTER pIOCPage0_t;
#define MPI_IOCPAGE0_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_IOC_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Flags; /* 04h */
U32 CoalescingTimeout; /* 08h */
U8 CoalescingDepth; /* 0Ch */
U8 PCISlotNum; /* 0Dh */
U8 Reserved[2]; /* 0Eh */
-} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
+} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
IOCPage1_t, MPI_POINTER pIOCPage1_t;
-#define MPI_IOCPAGE1_PAGEVERSION (0x01)
+#define MPI_IOCPAGE1_PAGEVERSION (0x02)
/* defines for the Flags field */
-#define MPI_IOCPAGE1_EEDP_HOST_SUPPORTS_DIF (0x08000000)
-#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)
-#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)
-#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)
-#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)
+#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010)
#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
U8 VolumeType; /* 04h */
U8 Flags; /* 05h */
U16 Reserved3; /* 06h */
-} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
+} CONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */
typedef struct _CONFIG_PAGE_IOC_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 CapabilitiesFlags; /* 04h */
U8 NumActiveVolumes; /* 08h */
U8 MaxVolumes; /* 09h */
U8 NumActivePhysDisks; /* 0Ah */
U8 MaxPhysDisks; /* 0Bh */
- fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
-} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
+ CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */
+} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
IOCPage2_t, MPI_POINTER pIOCPage2_t;
#define MPI_IOCPAGE2_PAGEVERSION (0x02)
typedef struct _CONFIG_PAGE_IOC_3
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 NumPhysDisks; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */
-} fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
+} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
IOCPage3_t, MPI_POINTER pIOCPage3_t;
#define MPI_IOCPAGE3_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IOC_4
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 ActiveSEP; /* 04h */
U8 MaxSEP; /* 05h */
U16 Reserved1; /* 06h */
IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */
-} fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
+} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
IOCPage4_t, MPI_POINTER pIOCPage4_t;
#define MPI_IOCPAGE4_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IOC_5
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 04h */
U8 NumHotSpares; /* 08h */
U8 Reserved2; /* 09h */
U16 Reserved3; /* 0Ah */
IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */
-} fCONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5,
+} CONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5,
IOCPage5_t, MPI_POINTER pIOCPage5_t;
#define MPI_IOCPAGE5_PAGEVERSION (0x00)
/****************************************************************************
-* BIOS Port Config Pages
+* BIOS Config Pages
****************************************************************************/
typedef struct _CONFIG_PAGE_BIOS_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 BiosOptions; /* 04h */
U32 IOCSettings; /* 08h */
U32 Reserved1; /* 0Ch */
U16 IOTimeoutSequential; /* 1Ah */
U16 IOTimeoutOther; /* 1Ch */
U16 IOTimeoutBlockDevicesRM; /* 1Eh */
-} fCONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1,
+} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1,
BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
-#define MPI_BIOSPAGE1_PAGEVERSION (0x00)
+#define MPI_BIOSPAGE1_PAGEVERSION (0x01)
/* values for the BiosOptions field */
#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
/* values for the IOCSettings field */
+#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)
+#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)
+#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)
+
+#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000)
+#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12)
+
#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)
#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)
#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)
#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)
+typedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER
+{
+ U32 Reserved1; /* 00h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U32 Reserved5; /* 10h */
+ U32 Reserved6; /* 14h */
+ U32 Reserved7; /* 18h */
+ U32 Reserved8; /* 1Ch */
+ U32 Reserved9; /* 20h */
+ U32 Reserved10; /* 24h */
+ U32 Reserved11; /* 28h */
+ U32 Reserved12; /* 2Ch */
+ U32 Reserved13; /* 30h */
+ U32 Reserved14; /* 34h */
+ U32 Reserved15; /* 38h */
+ U32 Reserved16; /* 3Ch */
+ U32 Reserved17; /* 40h */
+} MPI_BOOT_DEVICE_ADAPTER_ORDER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_ORDER;
+
+typedef struct _MPI_BOOT_DEVICE_ADAPTER_NUMBER
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 AdapterNumber; /* 02h */
+ U8 Reserved1; /* 03h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved5; /* 18h */
+ U32 Reserved6; /* 1Ch */
+ U32 Reserved7; /* 20h */
+ U32 Reserved8; /* 24h */
+ U32 Reserved9; /* 28h */
+ U32 Reserved10; /* 2Ch */
+ U32 Reserved11; /* 30h */
+ U32 Reserved12; /* 34h */
+ U32 Reserved13; /* 38h */
+ U32 Reserved14; /* 3Ch */
+ U32 Reserved15; /* 40h */
+} MPI_BOOT_DEVICE_ADAPTER_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_NUMBER;
+
+typedef struct _MPI_BOOT_DEVICE_PCI_ADDRESS
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U16 PCIAddress; /* 02h */
+ U32 Reserved1; /* 04h */
+ U32 Reserved2; /* 08h */
+ U32 Reserved3; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved4; /* 18h */
+ U32 Reserved5; /* 1Ch */
+ U32 Reserved6; /* 20h */
+ U32 Reserved7; /* 24h */
+ U32 Reserved8; /* 28h */
+ U32 Reserved9; /* 2Ch */
+ U32 Reserved10; /* 30h */
+ U32 Reserved11; /* 34h */
+ U32 Reserved12; /* 38h */
+ U32 Reserved13; /* 3Ch */
+ U32 Reserved14; /* 40h */
+} MPI_BOOT_DEVICE_PCI_ADDRESS, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_ADDRESS;
+
+typedef struct _MPI_BOOT_DEVICE_SLOT_NUMBER
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 PCISlotNumber; /* 02h */
+ U8 Reserved1; /* 03h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved5; /* 18h */
+ U32 Reserved6; /* 1Ch */
+ U32 Reserved7; /* 20h */
+ U32 Reserved8; /* 24h */
+ U32 Reserved9; /* 28h */
+ U32 Reserved10; /* 2Ch */
+ U32 Reserved11; /* 30h */
+ U32 Reserved12; /* 34h */
+ U32 Reserved13; /* 38h */
+ U32 Reserved14; /* 3Ch */
+ U32 Reserved15; /* 40h */
+} MPI_BOOT_DEVICE_PCI_SLOT_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_SLOT_NUMBER;
+
+typedef struct _MPI_BOOT_DEVICE_FC_WWN
+{
+ U64 WWPN; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved3; /* 18h */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_FC_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_FC_WWN;
+
+typedef struct _MPI_BOOT_DEVICE_SAS_WWN
+{
+ U64 SASAddress; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved3; /* 18h */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_SAS_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_SAS_WWN;
+
+typedef struct _MPI_BOOT_DEVICE_ENCLOSURE_SLOT
+{
+ U64 EnclosureLogicalID; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U16 SlotNumber; /* 18h */
+ U16 Reserved3; /* 1Ah */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_ENCLOSURE_SLOT,
+ MPI_POINTER PTR_MPI_BOOT_DEVICE_ENCLOSURE_SLOT;
+
+typedef union _MPI_BIOSPAGE2_BOOT_DEVICE
+{
+ MPI_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder;
+ MPI_BOOT_DEVICE_ADAPTER_NUMBER AdapterNumber;
+ MPI_BOOT_DEVICE_PCI_ADDRESS PCIAddress;
+ MPI_BOOT_DEVICE_PCI_SLOT_NUMBER PCISlotNumber;
+ MPI_BOOT_DEVICE_FC_WWN FcWwn;
+ MPI_BOOT_DEVICE_SAS_WWN SasWwn;
+ MPI_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot;
+} MPI_BIOSPAGE2_BOOT_DEVICE, MPI_POINTER PTR_MPI_BIOSPAGE2_BOOT_DEVICE;
+
+typedef struct _CONFIG_PAGE_BIOS_2
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 04h */
+ U32 Reserved2; /* 08h */
+ U32 Reserved3; /* 0Ch */
+ U32 Reserved4; /* 10h */
+ U32 Reserved5; /* 14h */
+ U32 Reserved6; /* 18h */
+ U8 BootDeviceForm; /* 1Ch */
+ U8 Reserved7; /* 1Dh */
+ U16 Reserved8; /* 1Eh */
+ MPI_BIOSPAGE2_BOOT_DEVICE BootDevice; /* 20h */
+} CONFIG_PAGE_BIOS_2, MPI_POINTER PTR_CONFIG_PAGE_BIOS_2,
+ BIOSPage2_t, MPI_POINTER pBIOSPage2_t;
+
+#define MPI_BIOSPAGE2_PAGEVERSION (0x01)
+
+#define MPI_BIOSPAGE2_FORM_MASK (0x0F)
+#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00)
+#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01)
+#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02)
+#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03)
+#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04)
+#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05)
+
/****************************************************************************
* SCSI Port Config Pages
typedef struct _CONFIG_PAGE_SCSI_PORT_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Capabilities; /* 04h */
U32 PhysicalInterface; /* 08h */
-} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
+} CONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
-#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)
+#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x02)
#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MAX_SYNC_OFFSET) \
>> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \
)
+#define MPI_SCSIPORTPAGE0_CAP_IDP (0x08000000)
#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
typedef struct _CONFIG_PAGE_SCSI_PORT_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Configuration; /* 04h */
U32 OnBusTimerValue; /* 08h */
U8 TargetConfig; /* 0Ch */
U8 Reserved1; /* 0Dh */
U16 IDConfig; /* 0Eh */
-} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
+} CONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x03)
typedef struct _CONFIG_PAGE_SCSI_PORT_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 PortFlags; /* 04h */
U32 PortSettings; /* 08h */
MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
-} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
+} CONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x02)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 NegotiatedParameters; /* 04h */
U32 Information; /* 08h */
-} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
+} CONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
-#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x03)
+#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x04)
#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8)
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16)
+#define MPI_SCSIDEVPAGE0_NP_IDP (0x08000000)
#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 RequestedParameters; /* 04h */
U32 Reserved; /* 08h */
U32 Configuration; /* 0Ch */
-} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
+} CONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
-#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x04)
+#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x05)
#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8)
#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16)
+#define MPI_SCSIDEVPAGE1_RP_IDP (0x08000000)
#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 DomainValidation; /* 04h */
U32 ParityPipeSelect; /* 08h */
U32 DataPipeSelect; /* 0Ch */
-} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
+} CONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_3
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U16 MsgRejectCount; /* 04h */
U16 PhaseErrorCount; /* 06h */
U16 ParityErrorCount; /* 08h */
U16 Reserved; /* 0Ah */
-} fCONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3,
+} CONFIG_PAGE_SCSI_DEVICE_3, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_3,
SCSIDevicePage3_t, MPI_POINTER pSCSIDevicePage3_t;
#define MPI_SCSIDEVPAGE3_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Flags; /* 04h */
U8 MPIPortNumber; /* 08h */
U8 LinkType; /* 09h */
U8 MaxHardAliasesSupported; /* 49h */
U8 NumCurrentAliases; /* 4Ah */
U8 Reserved1; /* 4Bh */
-} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
+} CONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
#define MPI_FCPORTPAGE0_PAGEVERSION (0x02)
#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */
-
typedef struct _CONFIG_PAGE_FC_PORT_1
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Flags; /* 04h */
U64 NoSEEPROMWWNN; /* 08h */
U64 NoSEEPROMWWPN; /* 10h */
U8 RR_TOV; /* 1Dh */
U8 InitiatorDeviceTimeout; /* 1Eh */
U8 InitiatorIoPendTimeout; /* 1Fh */
-} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
+} CONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
#define MPI_FCPORTPAGE1_PAGEVERSION (0x06)
#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000)
+#define MPI_FCPORTPAGE1_FLAGS_TARGET_LARGE_CDB_ENABLE (0x00000080)
#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
#define MPI_FCPORTPAGE1_ALT_CONN_UNKNOWN (0x00)
#define MPI_FCPORTPAGE1_INITIATOR_DEV_TIMEOUT_MASK (0x7F)
+#define MPI_FCPORTPAGE1_INITIATOR_DEV_UNIT_16 (0x80)
typedef struct _CONFIG_PAGE_FC_PORT_2
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 NumberActive; /* 04h */
U8 ALPA[127]; /* 05h */
-} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
+} CONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
#define MPI_FCPORTPAGE2_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_FC_PORT_3
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX]; /* 04h */
-} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
+} CONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_FC_PORT_4
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 PortFlags; /* 04h */
U32 PortSettings; /* 08h */
-} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
+} CONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
#define MPI_FCPORTPAGE4_PAGEVERSION (0x00)
U16 Reserved; /* 02h */
U64 AliasWWNN; /* 04h */
U64 AliasWWPN; /* 0Ch */
-} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
+} CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
typedef struct _CONFIG_PAGE_FC_PORT_5
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
- fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */
-} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo; /* 04h */
+} CONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
#define MPI_FCPORTPAGE5_PAGEVERSION (0x02)
typedef struct _CONFIG_PAGE_FC_PORT_6
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Reserved; /* 04h */
U64 TimeSinceReset; /* 08h */
U64 TxFrames; /* 10h */
U64 InvalidTxWordCount; /* 70h */
U64 InvalidCrcCount; /* 78h */
U64 FcpInitiatorIoCount; /* 80h */
-} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
+} CONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
#define MPI_FCPORTPAGE6_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_7
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Reserved; /* 04h */
U8 PortSymbolicName[256]; /* 08h */
-} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
+} CONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_8
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 BitVector[8]; /* 04h */
-} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
+} CONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_9
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U32 Reserved; /* 04h */
U64 GlobalWWPN; /* 08h */
U64 GlobalWWNN; /* 10h */
U8 IPAddress[16]; /* 28h */
U16 Reserved1; /* 38h */
U16 TopologyDiscoveryFlags; /* 3Ah */
-} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
+} CONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
U8 VendorOUI[3]; /* 35h */
U8 VendorPN[16]; /* 38h */
U8 VendorRev[4]; /* 48h */
- U16 Reserved4; /* 4Ch */
- U8 Reserved5; /* 4Eh */
+ U16 Wavelength; /* 4Ch */
+ U8 Reserved4; /* 4Eh */
U8 CC_BASE; /* 4Fh */
-} fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
+} CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA,
FCPortPage10BaseSfpData_t, MPI_POINTER pFCPortPage10BaseSfpData_t;
U8 BitRateMin; /* 53h */
U8 VendorSN[16]; /* 54h */
U8 DateCode[8]; /* 64h */
- U8 Reserved5[3]; /* 6Ch */
+ U8 DiagMonitoringType; /* 6Ch */
+ U8 EnhancedOptions; /* 6Dh */
+ U8 SFF8472Compliance; /* 6Eh */
U8 CC_EXT; /* 6Fh */
-} fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
+} CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA,
FCPortPage10ExtendedSfpData_t, MPI_POINTER pFCPortPage10ExtendedSfpData_t;
typedef struct _CONFIG_PAGE_FC_PORT_10
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 Flags; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
U32 HwConfig1; /* 08h */
U32 HwConfig2; /* 0Ch */
- fCONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
- fCONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
+ CONFIG_PAGE_FC_PORT_10_BASE_SFP_DATA Base; /* 10h */
+ CONFIG_PAGE_FC_PORT_10_EXTENDED_SFP_DATA Extended; /* 50h */
U8 VendorSpecific[32]; /* 70h */
-} fCONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
+} CONFIG_PAGE_FC_PORT_10, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_10,
FCPortPage10_t, MPI_POINTER pFCPortPage10_t;
-#define MPI_FCPORTPAGE10_PAGEVERSION (0x00)
+#define MPI_FCPORTPAGE10_PAGEVERSION (0x01)
/* standard MODDEF pin definitions (from GBIC spec.) */
#define MPI_FCPORTPAGE10_FLAGS_MODDEF_MASK (0x00000007)
typedef struct _CONFIG_PAGE_FC_DEVICE_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U64 WWNN; /* 04h */
U64 WWPN; /* 0Ch */
U32 PortIdentifier; /* 14h */
U8 FcPhHighestVersion; /* 21h */
U8 CurrentTargetID; /* 22h */
U8 CurrentBus; /* 23h */
-} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
+} CONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x03)
#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
+#define MPI_RAIDVOL0_STATUS_STATE_MISSING (0x03)
typedef struct _RAID_VOL0_SETTINGS
{
RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
/* RAID Volume Page 0 VolumeSettings defines */
-
#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
+#define MPI_RAIDVOL0_SETTING_FAST_DATA_SCRUBBING_0102 (0x0020) /* obsolete */
#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
typedef struct _CONFIG_PAGE_RAID_VOL_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 VolumeID; /* 04h */
U8 VolumeBus; /* 05h */
U8 VolumeIOC; /* 06h */
U32 Reserved2; /* 1Ch */
U32 Reserved3; /* 20h */
U8 NumPhysDisks; /* 24h */
- U8 Reserved4; /* 25h */
- U16 Reserved5; /* 26h */
+ U8 DataScrubRate; /* 25h */
+ U8 ResyncRate; /* 26h */
+ U8 InactiveStatus; /* 27h */
RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];/* 28h */
-} fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
+} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
-#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
+#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x04)
+
+/* values for RAID Volume Page 0 InactiveStatus field */
+#define MPI_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00)
+#define MPI_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01)
+#define MPI_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02)
+#define MPI_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03)
+#define MPI_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04)
+#define MPI_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05)
+#define MPI_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06)
+
+
+typedef struct _CONFIG_PAGE_RAID_VOL_1
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 VolumeID; /* 01h */
+ U8 VolumeBus; /* 02h */
+ U8 VolumeIOC; /* 03h */
+ U8 Reserved0; /* 04h */
+ U8 GUID[24]; /* 05h */
+ U8 Name[32]; /* 20h */
+ U64 WWID; /* 40h */
+ U32 Reserved1; /* 48h */
+ U32 Reserved2; /* 4Ch */
+} CONFIG_PAGE_RAID_VOL_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_1,
+ RaidVolumePage1_t, MPI_POINTER pRaidVolumePage1_t;
+
+#define MPI_RAIDVOLPAGE1_PAGEVERSION (0x01)
/****************************************************************************
#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
+#define MPI_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x04)
#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
U8 PhysDiskID; /* 04h */
U8 PhysDiskBus; /* 05h */
U8 PhysDiskIOC; /* 06h */
U8 PhysDiskNum; /* 07h */
RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */
U32 Reserved1; /* 0Ch */
- U32 Reserved2; /* 10h */
- U32 Reserved3; /* 14h */
+ U8 ExtDiskIdentifier[8]; /* 10h */
U8 DiskIdentifier[16]; /* 18h */
RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */
RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */
U32 MaxLBA; /* 68h */
RAID_PHYS_DISK0_ERROR_DATA ErrorData; /* 6Ch */
-} fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
+} CONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
-#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00)
+#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x01)
+
+
+typedef struct _RAID_PHYS_DISK1_PATH
+{
+ U8 PhysDiskID; /* 00h */
+ U8 PhysDiskBus; /* 01h */
+ U16 Reserved1; /* 02h */
+ U64 WWID; /* 04h */
+ U64 OwnerWWID; /* 0Ch */
+ U8 OwnerIdentifier; /* 14h */
+ U8 Reserved2; /* 15h */
+ U16 Flags; /* 16h */
+} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH,
+ RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t;
+
+/* RAID Physical Disk Page 1 Flags field defines */
+#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
+#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
+
+typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 NumPhysDiskPaths; /* 04h */
+ U8 PhysDiskNum; /* 05h */
+ U16 Reserved2; /* 06h */
+ U32 Reserved1; /* 08h */
+ RAID_PHYS_DISK1_PATH Path[1]; /* 0Ch */
+} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
+ RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
+
+#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00)
/****************************************************************************
U16 TxRxModes; /* 04h */
U16 Reserved; /* 06h */
U32 PacketPrePad; /* 08h */
-} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
+} CONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
LANPage0_t, MPI_POINTER pLANPage0_t;
#define MPI_LAN_PAGE0_PAGEVERSION (0x01)
U32 MaxReplySize; /* 24h */
U32 NegWireSpeedLow; /* 28h */
U32 NegWireSpeedHigh; /* 2Ch */
-} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
+} CONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
LANPage1_t, MPI_POINTER pLANPage1_t;
#define MPI_LAN_PAGE1_PAGEVERSION (0x03)
typedef struct _CONFIG_PAGE_INBAND_0
{
- fCONFIG_PAGE_HEADER Header; /* 00h */
+ CONFIG_PAGE_HEADER Header; /* 00h */
MPI_VERSION_FORMAT InbandVersion; /* 04h */
U16 MaximumBuffers; /* 08h */
U16 Reserved1; /* 0Ah */
-} fCONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0,
+} CONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0,
InbandPage0_t, MPI_POINTER pInbandPage0_t;
#define MPI_INBAND_PAGEVERSION (0x00)
U32 ControllerPhyDeviceInfo;/* 04h */
U16 AttachedDeviceHandle; /* 08h */
U16 ControllerDevHandle; /* 0Ah */
- U32 Reserved2; /* 0Ch */
+ U32 DiscoveryStatus; /* 0Ch */
} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA,
SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData;
typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U8 NumPhys; /* 0Ch */
U8 Reserved2; /* 0Dh */
U16 Reserved3; /* 0Eh */
MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */
-} fCONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
+} CONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t;
-#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x00)
+#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x02)
/* values for SAS IO Unit Page 0 PortFlags */
#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08)
#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
-#define MPI_SAS_IOUNIT0_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02)
#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
/* values for SAS IO Unit Page 0 PhyFlags */
/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
+/* values for SAS IO Unit Page 0 DiscoveryStatus */
+#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001)
+#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008)
+#define MPI_SAS_IOUNIT0_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_SAS_IOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_SAS_IOUNIT0_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_SAS_IOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_SAS_IOUNIT0_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200)
+#define MPI_SAS_IOUNIT0_DS_TABLE_LINK (0x00000400)
+#define MPI_SAS_IOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800)
+
typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA
{
typedef struct _CONFIG_PAGE_SAS_IO_UNIT_1
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
- U32 Reserved1; /* 08h */
- U8 NumPhys; /* 0Ch */
- U8 Reserved2; /* 0Dh */
- U16 Reserved3; /* 0Eh */
- MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 10h */
-} fCONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1,
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U16 ControlFlags; /* 08h */
+ U16 MaxNumSATATargets; /* 0Ah */
+ U32 Reserved1; /* 0Ch */
+ U8 NumPhys; /* 10h */
+ U8 SATAMaxQDepth; /* 11h */
+ U16 Reserved2; /* 12h */
+ MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 14h */
+} CONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1,
SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t;
-#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x00)
-
-/* values for SAS IO Unit Page 0 PortFlags */
-#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
-#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
-#define MPI_SAS_IOUNIT1_PORT_FLAGS_WAIT_FOR_PORTENABLE (0x02)
-#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
+#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x04)
+
+/* values for SAS IO Unit Page 1 ControlFlags */
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_3_0_MAX (0x4000)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_1_5_MAX (0x2000)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000)
+#define MPI_SAS_IOUNIT1_CONTROL_DISABLE_SAS_HASH (0x0800)
+
+#define MPI_SAS_IOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600)
+#define MPI_SAS_IOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x00)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x01)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x10)
+
+#define MPI_SAS_IOUNIT1_CONTROL_AUTO_PORT_SAME_SAS_ADDR (0x0100)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010)
+#define MPI_SAS_IOUNIT1_CONTROL_PHY_ENABLE_ORDER_HIGH (0x0008)
+#define MPI_SAS_IOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004)
+#define MPI_SAS_IOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002)
+#define MPI_SAS_IOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
+
+/* values for SAS IO Unit Page 1 PortFlags */
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
/* values for SAS IO Unit Page 0 PhyFlags */
-#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04)
-#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02)
-#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01)
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04)
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02)
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01)
/* values for SAS IO Unit Page 0 MaxMinLinkRate */
-#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0)
-#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80)
-#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90)
-#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F)
-#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08)
-#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09)
+#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0)
+#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80)
+#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90)
+#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F)
+#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08)
+#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09)
/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U16 MaxPersistentIDs; /* 0Ch */
U16 NumPersistentIDsUsed; /* 0Eh */
U8 Status; /* 10h */
U8 Flags; /* 11h */
- U16 Reserved2; /* 12h */
-} fCONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
+ U16 MaxNumPhysicalMappedIDs;/* 12h */ /* 12h */
+} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
-#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x00)
+#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x03)
/* values for SAS IO Unit Page 2 Status field */
#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
/* values for SAS IO Unit Page 2 Flags field */
#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01)
+/* Physical Mapping Modes */
+#define MPI_SAS_IOUNIT2_FLAGS_MASK_PHYS_MAP_MODE (0x0E)
+#define MPI_SAS_IOUNIT2_FLAGS_SHIFT_PHYS_MAP_MODE (1)
+#define MPI_SAS_IOUNIT2_FLAGS_NO_PHYS_MAP (0x00)
+#define MPI_SAS_IOUNIT2_FLAGS_DIRECT_ATTACH_PHYS_MAP (0x01)
+#define MPI_SAS_IOUNIT2_FLAGS_ENCLOSURE_SLOT_PHYS_MAP (0x02)
+
+#define MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT (0x10)
typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U32 MaxInvalidDwordCount; /* 0Ch */
U32 InvalidDwordCountTime; /* 10h */
U32 LossDwordSynchCountTime; /* 20h */
U32 MaxPhyResetProblemCount; /* 24h */
U32 PhyResetProblemTime; /* 28h */
-} fCONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3,
+} CONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3,
SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t;
#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00)
+/****************************************************************************
+* SAS Expander Config Pages
+****************************************************************************/
+
typedef struct _CONFIG_PAGE_SAS_EXPANDER_0
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
- U32 Reserved1; /* 08h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U8 PhysicalPort; /* 08h */
+ U8 Reserved1; /* 09h */
+ U16 Reserved2; /* 0Ah */
U64 SASAddress; /* 0Ch */
- U32 Reserved2; /* 14h */
+ U32 DiscoveryStatus; /* 14h */
U16 DevHandle; /* 18h */
U16 ParentDevHandle; /* 1Ah */
U16 ExpanderChangeCount; /* 1Ch */
U8 SASLevel; /* 21h */
U8 Flags; /* 22h */
U8 Reserved3; /* 23h */
-} fCONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0,
+} CONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0,
SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t;
-#define MPI_SASEXPANDER0_PAGEVERSION (0x00)
+#define MPI_SASEXPANDER0_PAGEVERSION (0x02)
+
+/* values for SAS Expander Page 0 DiscoveryStatus field */
+#define MPI_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001)
+#define MPI_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_SAS_EXPANDER0_DS_EXPANDER_ERR (0x00000008)
+#define MPI_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200)
+#define MPI_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400)
+#define MPI_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800)
/* values for SAS Expander Page 0 Flags field */
#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02)
#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01)
+typedef struct _CONFIG_PAGE_SAS_EXPANDER_1
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U8 PhysicalPort; /* 08h */
+ U8 Reserved1; /* 09h */
+ U16 Reserved2; /* 0Ah */
+ U8 NumPhys; /* 0Ch */
+ U8 Phy; /* 0Dh */
+ U16 NumTableEntriesProgrammed; /* 0Eh */
+ U8 ProgrammedLinkRate; /* 10h */
+ U8 HwLinkRate; /* 11h */
+ U16 AttachedDevHandle; /* 12h */
+ U32 PhyInfo; /* 14h */
+ U32 AttachedDeviceInfo; /* 18h */
+ U16 OwnerDevHandle; /* 1Ch */
+ U8 ChangeCount; /* 1Eh */
+ U8 NegotiatedLinkRate; /* 1Fh */
+ U8 PhyIdentifier; /* 20h */
+ U8 AttachedPhyIdentifier; /* 21h */
+ U8 NumTableEntriesProg; /* 22h */
+ U8 DiscoveryInfo; /* 23h */
+ U32 Reserved3; /* 24h */
+} CONFIG_PAGE_SAS_EXPANDER_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_1,
+ SasExpanderPage1_t, MPI_POINTER pSasExpanderPage1_t;
+
+#define MPI_SASEXPANDER1_PAGEVERSION (0x01)
+
+/* use MPI_SAS_PHY0_PRATE_ defines for ProgrammedLinkRate */
+
+/* use MPI_SAS_PHY0_HWRATE_ defines for HwLinkRate */
+
+/* use MPI_SAS_PHY0_PHYINFO_ defines for PhyInfo */
+
+/* see mpi_sas.h for values for SAS Expander Page 1 AttachedDeviceInfo values */
+
+/* values for SAS Expander Page 1 DiscoveryInfo field */
+#define MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY DISABLED (0x04)
+#define MPI_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02)
+#define MPI_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01)
+
+/* values for SAS Expander Page 1 NegotiatedLinkRate field */
+#define MPI_SAS_EXPANDER1_NEG_RATE_UNKNOWN (0x00)
+#define MPI_SAS_EXPANDER1_NEG_RATE_PHY_DISABLED (0x01)
+#define MPI_SAS_EXPANDER1_NEG_RATE_FAILED_NEGOTIATION (0x02)
+#define MPI_SAS_EXPANDER1_NEG_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_SAS_EXPANDER1_NEG_RATE_1_5 (0x08)
+#define MPI_SAS_EXPANDER1_NEG_RATE_3_0 (0x09)
+
+
+/****************************************************************************
+* SAS Device Config Pages
+****************************************************************************/
+
typedef struct _CONFIG_PAGE_SAS_DEVICE_0
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
- U32 Reserved1; /* 08h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U16 Slot; /* 08h */
+ U16 EnclosureHandle; /* 0Ah */
U64 SASAddress; /* 0Ch */
- U32 Reserved2; /* 14h */
+ U16 ParentDevHandle; /* 14h */
+ U8 PhyNum; /* 16h */
+ U8 AccessStatus; /* 17h */
U16 DevHandle; /* 18h */
U8 TargetID; /* 1Ah */
U8 Bus; /* 1Bh */
U32 DeviceInfo; /* 1Ch */
U16 Flags; /* 20h */
U8 PhysicalPort; /* 22h */
- U8 Reserved3; /* 23h */
-} fCONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0,
+ U8 Reserved2; /* 23h */
+} CONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0,
SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t;
-#define MPI_SASDEVICE0_PAGEVERSION (0x00)
+#define MPI_SASDEVICE0_PAGEVERSION (0x04)
+
+/* values for SAS Device Page 0 AccessStatus field */
+#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
+#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
+#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
/* values for SAS Device Page 0 Flags field */
-#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x04)
-#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x02)
-#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x01)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200)
+#define MPI_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
+#define MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
+#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x0004)
+#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x0002)
+#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */
typedef struct _CONFIG_PAGE_SAS_DEVICE_1
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U64 SASAddress; /* 0Ch */
U32 Reserved2; /* 14h */
U8 TargetID; /* 1Ah */
U8 Bus; /* 1Bh */
U8 InitialRegDeviceFIS[20];/* 1Ch */
-} fCONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1,
+} CONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1,
SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t;
#define MPI_SASDEVICE1_PAGEVERSION (0x00)
+typedef struct _CONFIG_PAGE_SAS_DEVICE_2
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U64 PhysicalIdentifier; /* 08h */
+ U32 Reserved1; /* 10h */
+} CONFIG_PAGE_SAS_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_2,
+ SasDevicePage2_t, MPI_POINTER pSasDevicePage2_t;
+
+#define MPI_SASDEVICE2_PAGEVERSION (0x00)
+
+
+/****************************************************************************
+* SAS PHY Config Pages
+****************************************************************************/
+
typedef struct _CONFIG_PAGE_SAS_PHY_0
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U64 SASAddress; /* 0Ch */
U16 AttachedDevHandle; /* 14h */
U8 ChangeCount; /* 22h */
U8 Reserved3; /* 23h */
U32 PhyInfo; /* 24h */
-} fCONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0,
+} CONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0,
SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t;
#define MPI_SASPHY0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_SAS_PHY_1
{
- fCONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
U32 Reserved1; /* 08h */
U32 InvalidDwordCount; /* 0Ch */
U32 RunningDisparityErrorCount; /* 10h */
U32 LossDwordSynchCount; /* 14h */
U32 PhyResetProblemCount; /* 18h */
-} fCONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1,
+} CONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1,
SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t;
#define MPI_SASPHY1_PAGEVERSION (0x00)
+/****************************************************************************
+* SAS Enclosure Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_SAS_ENCLOSURE_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U64 EnclosureLogicalID; /* 0Ch */
+ U16 Flags; /* 14h */
+ U16 EnclosureHandle; /* 16h */
+ U16 NumSlots; /* 18h */
+ U16 StartSlot; /* 1Ah */
+ U8 StartTargetID; /* 1Ch */
+ U8 StartBus; /* 1Dh */
+ U8 SEPTargetID; /* 1Eh */
+ U8 SEPBus; /* 1Fh */
+ U32 Reserved2; /* 20h */
+ U32 Reserved3; /* 24h */
+} CONFIG_PAGE_SAS_ENCLOSURE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_ENCLOSURE_0,
+ SasEnclosurePage0_t, MPI_POINTER pSasEnclosurePage0_t;
+
+#define MPI_SASENCLOSURE0_PAGEVERSION (0x00)
+
+/* values for SAS Enclosure Page 0 Flags field */
+#define MPI_SAS_ENCLS0_FLAGS_SEP_BUS_ID_VALID (0x0020)
+#define MPI_SAS_ENCLS0_FLAGS_START_BUS_ID_VALID (0x0010)
+
+#define MPI_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004)
+
+
+/****************************************************************************
+* Log Config Pages
+****************************************************************************/
+/*
+ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
+ * one and check NumLogEntries at runtime.
+ */
+#ifndef MPI_LOG_0_NUM_LOG_ENTRIES
+#define MPI_LOG_0_NUM_LOG_ENTRIES (1)
+#endif
+
+#define MPI_LOG_0_LOG_DATA_LENGTH (20)
+
+typedef struct _MPI_LOG_0_ENTRY
+{
+ U64 WWID; /* 00h */
+ U32 TimeStamp; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U16 LogSequence; /* 10h */
+ U16 LogEntryQualifier; /* 12h */
+ U8 LogData[MPI_LOG_0_LOG_DATA_LENGTH]; /* 14h */
+} MPI_LOG_0_ENTRY, MPI_POINTER PTR_MPI_LOG_0_ENTRY,
+ MpiLog0Entry_t, MPI_POINTER pMpiLog0Entry_t;
+
+/* values for Log Page 0 LogEntry LogEntryQualifier field */
+#define MPI_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000)
+#define MPI_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001)
+
+typedef struct _CONFIG_PAGE_LOG_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U16 NumLogEntries; /* 10h */
+ U16 Reserved3; /* 12h */
+ MPI_LOG_0_ENTRY LogEntry[MPI_LOG_0_NUM_LOG_ENTRIES]; /* 14h */
+} CONFIG_PAGE_LOG_0, MPI_POINTER PTR_CONFIG_PAGE_LOG_0,
+ LogPage0_t, MPI_POINTER pLogPage0_t;
+
+#define MPI_LOG_0_PAGEVERSION (0x00)
+
+
#endif
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2004 LSI Logic Corporation.
*
*
* Name: mpi_fc.h
* Title: MPI Fibre Channel messages and structures
* Creation Date: June 12, 2000
*
- * mpi_fc.h Version: 01.05.xx
+ * mpi_fc.h Version: 01.05.01
*
* Version History
* ---------------
* 09-28-01 01.02.02 Change name of reserved field in
* MSG_LINK_SERVICE_RSP_REPLY.
* 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
+ * 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
MPI Header File Change History
==============================
- Copyright (c) 2000-2001 LSI Logic Corporation.
+ Copyright (c) 2000-2005 LSI Logic Corporation.
---------------------------------------
- Header Set Release Version: 01.01.10
- Header Set Release Date: 04-09-01
+ Header Set Release Version: 01.05.09
+ Header Set Release Date: 03-11-05
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
- mpi.h 01.01.07 01.01.06
- mpi_ioc.h 01.01.07 01.01.06
- mpi_cnfg.h 01.01.11 01.01.10
- mpi_init.h 01.01.05 01.01.04
- mpi_targ.h 01.01.04 01.01.04
- mpi_fc.h 01.01.07 01.01.06
- mpi_lan.h 01.01.03 01.01.03
- mpi_raid.h 01.01.02 01.01.02
- mpi_type.h 01.01.02 01.01.02
- mpi_history.txt 01.01.09 01.01.09
+ mpi.h 01.05.07 01.05.06
+ mpi_ioc.h 01.05.08 01.05.07
+ mpi_cnfg.h 01.05.08 01.05.07
+ mpi_init.h 01.05.04 01.05.03
+ mpi_targ.h 01.05.04 01.05.03
+ mpi_fc.h 01.05.01 01.05.01
+ mpi_lan.h 01.05.01 01.05.01
+ mpi_raid.h 01.05.02 01.05.02
+ mpi_tool.h 01.05.03 01.05.03
+ mpi_inb.h 01.05.01 01.05.01
+ mpi_sas.h 01.05.01 01.05.01
+ mpi_type.h 01.05.01 01.05.01
+ mpi_history.txt 01.05.09 01.05.08
* Date Version Description
* Added function codes for RAID.
* 04-09-01 01.01.07 Added alternate define for MPI_DOORBELL_ACTIVE,
* MPI_DOORBELL_USED, to better match the spec.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * Changed MPI_VERSION_MINOR from 0x01 to 0x02.
+ * Added define MPI_FUNCTION_TOOLBOX.
+ * 09-28-01 01.02.02 New function code MPI_SCSI_ENCLOSURE_PROCESSOR.
+ * 11-01-01 01.02.03 Changed name to MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR.
+ * 03-14-02 01.02.04 Added MPI_HEADER_VERSION_ defines.
+ * 05-31-02 01.02.05 Bumped MPI_HEADER_VERSION_UNIT.
+ * 07-12-02 01.02.06 Added define for MPI_FUNCTION_MAILBOX.
+ * 09-16-02 01.02.07 Bumped value for MPI_HEADER_VERSION_UNIT.
+ * 11-15-02 01.02.08 Added define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX and
+ * obsoleted define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX.
+ * 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
+ * 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
+ * 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
+ * 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
+ * and MPI_FUNCTION_DIAG_RELEASE.
+ * Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
+ * Bumped MPI_HEADER_VERSION_UNIT value.
+ * 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
+ * Added codes for Inband.
+ * 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
+ * Added define for offset of High Priority Request Queue.
+ * Added new function codes and new IOCStatus codes.
+ * Added a IOCLogInfo type of SAS.
+ * 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
+ * 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
+ * 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
+ * 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
+ * TargetAssistExtended requests.
+ * Removed EEDP IOCStatus codes.
* --------------------------------------------------------------------------
mpi_ioc.h
* 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
* Added structure offset comments.
* 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * New format for FWVersion and ProductId in
+ * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
+ * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
+ * related structure and defines.
+ * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
+ * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
+ * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
+ * IOCExceptions and changed DataImageSize to reserved.
+ * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
+ * MPI_FW_UPLOAD_ITYPE_NVDATA.
+ * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
+ * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
+ * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
+ * 05-31-02 01.02.06 Added define for
+ * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
+ * Added AliasIndex to EVENT_DATA_LOGOUT structure.
+ * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
+ * 06-26-03 01.02.08 Added new values to the product family defines.
+ * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
+ * added related defines.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
+ * Added three new fields to MSG_IOC_FACTS_REPLY.
+ * Defined four new bits for the IOCCapabilities field of
+ * the IOCFacts reply.
+ * Added two new PortTypes for the PortFacts reply.
+ * Added six new events along with their EventData
+ * structures.
+ * Added a new MsgFlag to the FwDownload request to
+ * indicate last segment.
+ * Defined a new image type of boot loader.
+ * Added FW family codes for SAS product families.
+ * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
+ * MSG_IOC_FACTS_REPLY.
+ * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
+ * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
+ * 01-15-05 01.05.05 Added event data for SAS SES Event.
+ * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
+ * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
+ * Reply and IOC Init Request.
+ * 03-11-05 01.05.08 Added family code for 1068E family.
+ * Removed IOCFacts Reply EEDP Capability bit.
* --------------------------------------------------------------------------
mpi_cnfg.h
* Added IO Unit Page 3.
* Modified defines for Scsi Port Page 2.
* Modified RAID Volume Pages.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * Added SepID and SepBus to RVP2 IMPhysicalDisk struct.
+ * Added defines for the SEP bits in RVP2 VolumeSettings.
+ * Modified the DeviceSettings field in RVP2 to use the
+ * proper structure.
+ * Added defines for SES, SAF-TE, and cross channel for
+ * IOCPage2 CapabilitiesFlags.
+ * Removed define for MPI_IOUNITPAGE2_FLAGS_RAID_DISABLE.
+ * Removed define for
+ * MPI_SCSIPORTPAGE2_PORT_FLAGS_PARITY_ENABLE.
+ * Added define for MPI_CONFIG_PAGEATTR_RO_PERSISTENT.
+ * 08-29-01 01.02.02 Fixed value for MPI_MANUFACTPAGE_DEVID_53C1035.
+ * Added defines for MPI_FCPORTPAGE1_FLAGS_HARD_ALPA_ONLY
+ * and MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY.
+ * Removed MPI_SCSIPORTPAGE0_CAP_PACING_TRANSFERS,
+ * MPI_SCSIDEVPAGE0_NP_PACING_TRANSFERS, and
+ * MPI_SCSIDEVPAGE1_RP_PACING_TRANSFERS, and
+ * MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED.
+ * Added defines for MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED
+ * and MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED.
+ * Added OnBusTimerValue to CONFIG_PAGE_SCSI_PORT_1.
+ * Added rejected bits to SCSI Device Page 0 Information.
+ * Increased size of ALPA array in FC Port Page 2 by one
+ * and removed a one byte reserved field.
+ * 09-28-01 01.02.03 Swapped NegWireSpeedLow and NegWireSpeedLow in
+ * CONFIG_PAGE_LAN_1 to match preferred 64-bit ordering.
+ * Added structures for Manufacturing Page 4, IO Unit
+ * Page 3, IOC Page 3, IOC Page 4, RAID Volume Page 0, and
+ * RAID PhysDisk Page 0.
+ * 10-04-01 01.02.04 Added define for MPI_CONFIG_PAGETYPE_RAID_PHYSDISK.
+ * Modified some of the new defines to make them 32
+ * character unique.
+ * Modified how variable length pages (arrays) are defined.
+ * Added generic defines for hot spare pools and RAID
+ * volume types.
+ * 11-01-01 01.02.05 Added define for MPI_IOUNITPAGE1_DISABLE_IR.
+ * 03-14-02 01.02.06 Added PCISlotNum field to CONFIG_PAGE_IOC_1 along with
+ * related define, and bumped the page version define.
+ * 05-31-02 01.02.07 Added a Flags field to CONFIG_PAGE_IOC_2_RAID_VOL in a
+ * reserved byte and added a define.
+ * Added define for
+ * MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE.
+ * Added new config page: CONFIG_PAGE_IOC_5.
+ * Added MaxAliases, MaxHardAliases, and NumCurrentAliases
+ * fields to CONFIG_PAGE_FC_PORT_0.
+ * Added AltConnector and NumRequestedAliases fields to
+ * CONFIG_PAGE_FC_PORT_1.
+ * Added new config page: CONFIG_PAGE_FC_PORT_10.
+ * 07-12-02 01.02.08 Added more MPI_MANUFACTPAGE_DEVID_ defines.
+ * Added additional MPI_SCSIDEVPAGE0_NP_ defines.
+ * Added more MPI_SCSIDEVPAGE1_RP_ defines.
+ * Added define for
+ * MPI_SCSIDEVPAGE1_CONF_EXTENDED_PARAMS_ENABLE.
+ * Added new config page: CONFIG_PAGE_SCSI_DEVICE_3.
+ * Modified MPI_FCPORTPAGE5_FLAGS_ defines.
+ * 09-16-02 01.02.09 Added MPI_SCSIDEVPAGE1_CONF_FORCE_PPR_MSG define.
+ * 11-15-02 01.02.10 Added ConnectedID defines for CONFIG_PAGE_SCSI_PORT_0.
+ * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
+ * Added more Flags defines for CONFIG_PAGE_FC_DEVICE_0.
+ * 04-01-03 01.02.11 Added RR_TOV field and additional Flags defines for
+ * CONFIG_PAGE_FC_PORT_1.
+ * Added define MPI_FCPORTPAGE5_FLAGS_DISABLE to disable
+ * an alias.
+ * Added more device id defines.
+ * 06-26-03 01.02.12 Added MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID define.
+ * Added TargetConfig and IDConfig fields to
+ * CONFIG_PAGE_SCSI_PORT_1.
+ * Added more PortFlags defines for CONFIG_PAGE_SCSI_PORT_2
+ * to control DV.
+ * Added more Flags defines for CONFIG_PAGE_FC_PORT_1.
+ * In CONFIG_PAGE_FC_DEVICE_0, replaced Reserved1 field
+ * with ADISCHardALPA.
+ * Added MPI_FC_DEVICE_PAGE0_PROT_FCP_RETRY define.
+ * 01-16-04 01.02.13 Added InitiatorDeviceTimeout and InitiatorIoPendTimeout
+ * fields and related defines to CONFIG_PAGE_FC_PORT_1.
+ * Added define for
+ * MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
+ * Added new fields to the substructures of
+ * CONFIG_PAGE_FC_PORT_10.
+ * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
+ * CONFIG_PAGE_SCSI_DEVICE_0, and
+ * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
+ * these pages.
+ * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
+ * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
+ * pages.
+ * Added a new structure for extended config page header.
+ * Added new extended config pages types and structures for
+ * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
+ * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
+ * to add a Flags field.
+ * Two new Manufacturing config pages (5 and 6).
+ * Two new bits defined for IO Unit Page 1 Flags field.
+ * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
+ * to specify the BIOS boot device.
+ * Four new Flags bits defined for IO Unit Page 2.
+ * Added IO Unit Page 4.
+ * Added EEDP Flags settings to IOC Page 1.
+ * Added new BIOS Page 1 config page.
+ * 10-05-04 01.05.02 Added define for
+ * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
+ * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
+ * associated defines.
+ * Added more defines for SAS IO Unit Page 0
+ * DiscoveryStatus field.
+ * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
+ * and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
+ * Added defines for Physical Mapping Modes to SAS IO Unit
+ * Page 2.
+ * Added define for
+ * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
+ * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
+ * Added defines for MaxTargetSpinUp to BIOS Page 1.
+ * Added 5 new ControlFlags defines for SAS IO Unit
+ * Page 1.
+ * Added MaxNumPhysicalMappedIDs field to SAS IO Unit
+ * Page 2.
+ * Added AccessStatus field to SAS Device Page 0 and added
+ * new Flags bits for supported SATA features.
+ * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
+ * Volume Page 1, and RAID Physical Disk Page 1.
+ * Replaced IO Unit Page 1 BootTargetID,BootBus, and
+ * BootAdapterNum with reserved field.
+ * Added DataScrubRate and ResyncRate to RAID Volume
+ * Page 0.
+ * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
+ * define.
+ * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
+ * Flags field.
+ * Added Auto Port Config flag define for SAS IOUNIT
+ * Page 1 ControlFlags.
+ * Added Disabled bad Phy define to Expander Page 1
+ * Discovery Info field.
+ * Added SAS/SATA device support to SAS IOUnit Page 1
+ * ControlFlags.
+ * Added Unsupported device to SAS Dev Page 0 Flags field
+ * Added disable use SATA Hash Address for SAS IOUNIT
+ * page 1 in ControlFields.
+ * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
+ * Manufacturing Page 4.
+ * Added new defines for BIOS Page 1 IOCSettings field.
+ * Added ExtDiskIdentifier field to RAID Physical Disk
+ * Page 0.
+ * Added new defines for SAS IO Unit Page 1 ControlFlags
+ * and to SAS Device Page 0 Flags to control SATA devices.
+ * Added defines and structures for the new Log Page 0, a
+ * new type of configuration page.
+ * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
+ * Added WWID field to RAID Volume Page 1.
+ * Added PhysicalPort field to SAS Expander pages 0 and 1.
+ * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
+ * Added Enclosure/Slot boot device format to BIOS Page 2.
+ * New status value for RAID Volume Page 0 VolumeStatus
+ * (VolumeState subfield).
+ * New value for RAID Physical Page 0 InactiveStatus.
+ * Added Inactive Volume Member flag RAID Physical Disk
+ * Page 0 PhysDiskStatus field.
+ * New physical mapping mode in SAS IO Unit Page 2.
+ * Added CONFIG_PAGE_SAS_ENCLOSURE_0.
+ * Added Slot and Enclosure fields to SAS Device Page 0.
* --------------------------------------------------------------------------
mpi_init.h
* 02-20-01 01.01.03 Started using MPI_POINTER.
* 03-27-01 01.01.04 Added structure offset comments.
* 04-10-01 01.01.05 Added new MsgFlag for MSG_SCSI_TASK_MGMT.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 08-29-01 01.02.02 Added MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET.
+ * Added MPI_SCSI_STATE_QUEUE_TAG_REJECTED for
+ * MSG_SCSI_IO_REPLY.
+ * 09-28-01 01.02.03 Added structures and defines for SCSI Enclosure
+ * Processor messages.
+ * 10-04-01 01.02.04 Added defines for SEP request Action field.
+ * 05-31-02 01.02.05 Added MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR define
+ * for SCSI IO requests.
+ * 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
+ * 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
+ * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
+ * and a reserved U16.
+ * Added new MSG_SCSI_IO32_REQUEST structure.
+ * Added a TaskType of Clear Task Set to SCSI
+ * Task Management request.
+ * 12-07-04 01.05.02 Added support for Task Management Query Task.
+ * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
+ * WWID addressing.
+ * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
+ * Removed SCSI IO 32 Request.
+ * Modified SCSI Enclosure Processor Request and Reply to
+ * support Enclosure/Slot addressing rather than WWID
+ * addressing.
* --------------------------------------------------------------------------
mpi_targ.h
* Added structures for MPI_TARGET_SCSI_SPI_CMD_BUFFER and
* MPI_TARGET_FCP_CMD_BUFFER.
* 03-27-01 01.01.04 Added structure offset comments.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 09-28-01 01.02.02 Added structure for MPI_TARGET_SCSI_SPI_STATUS_IU.
+ * Added PriorityReason field to some replies and
+ * defined more PriorityReason codes.
+ * Added some defines for to support previous version
+ * of MPI.
+ * 10-04-01 01.02.03 Added PriorityReason to MSG_TARGET_ERROR_REPLY.
+ * 11-01-01 01.02.04 Added define for TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY.
+ * 03-14-02 01.02.05 Modified MPI_TARGET_FCP_RSP_BUFFER to get the proper
+ * byte ordering.
+ * 05-31-02 01.02.06 Modified TARGET_MODE_REPLY_ALIAS_MASK to only include
+ * one bit.
+ * Added AliasIndex field to MPI_TARGET_FCP_CMD_BUFFER.
+ * 09-16-02 01.02.07 Added flags for confirmed completion.
+ * Added PRIORITY_REASON_TARGET_BUSY.
+ * 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
+ * 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added new request message structures for
+ * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
+ * MSG_TARGET_ASSIST_EXT_REQUEST.
+ * Added new structures for SAS SSP Command buffer, SSP
+ * Task buffer, and SSP Status IU.
+ * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
+ * 02-22-05 01.05.03 Changed a comment.
+ * 03-11-05 01.05.04 Removed TargetAssistExtended Request.
* --------------------------------------------------------------------------
mpi_fc.h
* Added MPI_FC_PRIM_SEND_FLAGS_RESET_LINK define.
* Added structure offset comments.
* 04-09-01 01.01.07 Added RspLength field to MSG_LINK_SERVICE_RSP_REQUEST.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 09-28-01 01.02.02 Change name of reserved field in
+ * MSG_LINK_SERVICE_RSP_REPLY.
+ * 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
+ * 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_lan.h
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Started using MPI_POINTER.
* 03-27-01 01.01.03 Added structure offset comments.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_raid.h
* 02-27-01 01.01.01 Original release for this file.
* 03-27-01 01.01.02 Added structure offset comments.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
+ * 09-28-01 01.02.02 Major rework for MPI v1.2 Integrated RAID changes.
+ * 10-04-01 01.02.03 Added ActionData defines for
+ * MPI_RAID_ACTION_DELETE_VOLUME action.
+ * 11-01-01 01.02.04 Added define for MPI_RAID_ACTION_ADATA_DO_NOT_SYNC.
+ * 03-14-02 01.02.05 Added define for MPI_RAID_ACTION_ADATA_LOW_LEVEL_INIT.
+ * 05-07-02 01.02.06 Added define for MPI_RAID_ACTION_ACTIVATE_VOLUME,
+ * MPI_RAID_ACTION_INACTIVATE_VOLUME, and
+ * MPI_RAID_ACTION_ADATA_INACTIVATE_ALL.
+ * 07-12-02 01.02.07 Added structures for Mailbox request and reply.
+ * 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
+ * 04-01-03 01.02.09 New action data option flag for
+ * MPI_RAID_ACTION_DELETE_VOLUME.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 01-15-05 01.05.02 Added defines for the two new RAID Actions for
+ * _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
+ * --------------------------------------------------------------------------
+
+mpi_tool.h
+ * 08-08-01 01.02.01 Original release.
+ * 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
+ * 01-16-04 01.02.03 Added defines and structures for new tools
+ *. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
+ * MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
+ * 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
+ * Diagnostic Release requests and replies.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
+ * 02-09-05 01.05.03 Added frame size option to FC management tool.
+ * Added Beacon tool to the Toolbox.
+ * --------------------------------------------------------------------------
+
+mpi_inb.h
+ * 05-11-04 01.03.01 Original release.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * --------------------------------------------------------------------------
+
+mpi_sas.h
+ * 08-19-04 01.05.01 Original release.
* --------------------------------------------------------------------------
mpi_type.h
* 06-06-00 01.00.01 Update version number for 1.0 release.
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
+ * 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
mpi_history.txt Parts list history
-Filename 01.01.10
+Filename 01.05.09
---------- --------
-mpi.h 01.01.07
-mpi_ioc.h 01.01.07
-mpi_cnfg.h 01.01.11
-mpi_init.h 01.01.05
-mpi_targ.h 01.01.04
-mpi_fc.h 01.01.07
-mpi_lan.h 01.01.03
-mpi_raid.h 01.01.02
-mpi_type.h 01.01.02
+mpi.h 01.05.07
+mpi_ioc.h 01.05.08
+mpi_cnfg.h 01.05.08
+mpi_init.h 01.05.04
+mpi_targ.h 01.05.04
+mpi_fc.h 01.05.01
+mpi_lan.h 01.05.01
+mpi_raid.h 01.05.02
+mpi_tool.h 01.05.03
+mpi_inb.h 01.05.01
+mpi_sas.h 01.05.01
+mpi_type.h 01.05.01
+
+Filename 01.05.08 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03
+---------- -------- -------- -------- -------- -------- --------
+mpi.h 01.05.06 01.05.05 01.05.04 01.05.03 01.05.02 01.05.01
+mpi_ioc.h 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03 01.05.02
+mpi_cnfg.h 01.05.07 01.05.07 01.05.06 01.05.05 01.05.04 01.05.03
+mpi_init.h 01.05.03 01.05.03 01.05.03 01.05.02 01.05.02 01.05.01
+mpi_targ.h 01.05.03 01.05.02 01.05.02 01.05.02 01.05.02 01.05.02
+mpi_fc.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
+mpi_lan.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
+mpi_raid.h 01.05.02 01.05.02 01.05.02 01.05.01 01.05.01 01.05.01
+mpi_tool.h 01.05.03 01.05.03 01.05.02 01.05.02 01.05.02 01.05.02
+mpi_inb.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
+mpi_sas.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
+mpi_type.h 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01 01.05.01
+
+Filename 01.05.02 01.05.01 01.03.01 01.02.14 01.02.13 01.02.12
+---------- -------- -------- -------- -------- -------- --------
+mpi.h 01.05.01 01.05.01 01.03.01 01.02.12 01.02.11 01.02.10
+mpi_ioc.h 01.05.02 01.05.01 01.03.01 01.02.09 01.02.08 01.02.08
+mpi_cnfg.h 01.05.02 01.05.01 01.03.01 01.02.14 01.02.13 01.02.12
+mpi_init.h 01.05.01 01.05.01 01.03.01 01.02.07 01.02.07 01.02.07
+mpi_targ.h 01.05.02 01.05.01 01.03.01 01.02.09 01.02.09 01.02.09
+mpi_fc.h 01.05.01 01.05.01 01.03.01 01.02.04 01.02.04 01.02.03
+mpi_lan.h 01.05.01 01.05.01 01.03.01 01.02.01 01.02.01 01.02.01
+mpi_raid.h 01.05.01 01.05.01 01.03.01 01.02.09 01.02.09 01.02.09
+mpi_tool.h 01.05.02 01.05.01 01.03.01 01.02.01 01.02.01 01.02.01
+mpi_inb.h 01.05.01 01.05.01 01.03.01
+mpi_sas.h 01.05.01 01.05.01
+mpi_type.h 01.05.01 01.05.01 01.03.01 01.02.04 01.02.03 01.02.02
+
+Filename 01.02.11 01.02.10 01.02.09 01.02.08 01.02.07 01.02.06
+---------- -------- -------- -------- -------- -------- --------
+mpi.h 01.02.09 01.02.08 01.02.07 01.02.06 01.02.05 01.02.04
+mpi_ioc.h 01.02.07 01.02.06 01.02.06 01.02.06 01.02.06 01.02.05
+mpi_cnfg.h 01.02.11 01.02.10 01.02.09 01.02.08 01.02.07 01.02.06
+mpi_init.h 01.02.06 01.02.06 01.02.05 01.02.05 01.02.05 01.02.04
+mpi_targ.h 01.02.09 01.02.08 01.02.07 01.02.06 01.02.06 01.02.05
+mpi_fc.h 01.02.03 01.02.03 01.02.03 01.02.03 01.02.03 01.02.02
+mpi_lan.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01
+mpi_raid.h 01.02.09 01.02.08 01.02.07 01.02.07 01.02.06 01.02.05
+mpi_tool.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01
+mpi_type.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.02 01.02.02
+
+Filename 01.02.05 01.02.04 01.02.03 01.02.02 01.02.01 01.01.10
+---------- -------- -------- -------- -------- -------- --------
+mpi.h 01.02.03 01.02.02 01.02.02 01.02.01 01.02.01 01.01.07
+mpi_ioc.h 01.02.04 01.02.03 01.02.03 01.02.02 01.02.01 01.01.07
+mpi_cnfg.h 01.02.05 01.02.04 01.02.03 01.02.02 01.02.01 01.01.11
+mpi_init.h 01.02.04 01.02.04 01.02.03 01.02.02 01.02.01 01.01.05
+mpi_targ.h 01.02.04 01.02.03 01.02.02 01.02.01 01.02.01 01.01.04
+mpi_fc.h 01.02.02 01.02.02 01.02.02 01.02.01 01.02.01 01.01.07
+mpi_lan.h 01.02.01 01.02.01 01.02.01 01.02.01 01.02.01 01.01.03
+mpi_raid.h 01.02.04 01.02.03 01.02.02 01.02.01 01.02.01 01.01.02
+mpi_tool.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.01
+mpi_type.h 01.02.02 01.02.02 01.02.02 01.02.02 01.02.01 01.01.02
Filename 01.01.09 01.01.08 01.01.07 01.01.06 01.01.05 01.01.04
---------- -------- -------- -------- -------- -------- --------
/*
- * Copyright (c) 2003 LSI Logic Corporation.
+ * Copyright (c) 2003-2004 LSI Logic Corporation.
*
*
* Name: mpi_inb.h
* Title: MPI Inband structures and definitions
* Creation Date: September 30, 2003
*
- * mpi_inb.h Version: 01.03.xx
+ * mpi_inb.h Version: 01.05.01
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
- * ??-??-?? 01.03.01 Original release.
+ * 05-11-04 01.03.01 Original release.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2005 LSI Logic Corporation.
*
*
* Name: mpi_init.h
* Title: MPI initiator mode messages and structures
* Creation Date: June 8, 2000
*
- * mpi_init.h Version: 01.05.xx
+ * mpi_init.h Version: 01.05.04
*
* Version History
* ---------------
* for SCSI IO requests.
* 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
* 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
+ * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
+ * and a reserved U16.
+ * Added new MSG_SCSI_IO32_REQUEST structure.
+ * Added a TaskType of Clear Task Set to SCSI
+ * Task Management request.
+ * 12-07-04 01.05.02 Added support for Task Management Query Task.
+ * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
+ * WWID addressing.
+ * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
+ * Removed SCSI IO 32 Request.
+ * Modified SCSI Enclosure Processor Request and Reply to
+ * support Enclosure/Slot addressing rather than WWID
+ * addressing.
* --------------------------------------------------------------------------
*/
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
+
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
-#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
-#define MPI_SCSIIO_MSGFLGS_EEDP_TYPE_MASK (0xE0)
-#define MPI_SCSIIO_MSGFLGS_EEDP_NONE (0x00)
-#define MPI_SCSIIO_MSGFLGS_EEDP_RDPROTECT_T10 (0x20)
-#define MPI_SCSIIO_MSGFLGS_EEDP_VRPROTECT_T10 (0x40)
-#define MPI_SCSIIO_MSGFLGS_EEDP_WRPROTECT_T10 (0x60)
-#define MPI_SCSIIO_MSGFLGS_EEDP_520_READ_MODE1 (0x20)
-#define MPI_SCSIIO_MSGFLGS_EEDP_520_WRITE_MODE1 (0x40)
-#define MPI_SCSIIO_MSGFLGS_EEDP_8_9_READ_MODE1 (0x60)
-#define MPI_SCSIIO_MSGFLGS_EEDP_8_9_WRITE_MODE1 (0x80)
+#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
/* SCSI IO LUN fields */
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
+ U16 TaskTag; /* 20h */
+ U16 Reserved1; /* 22h */
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
-
-/****************************************************************************/
-/* SCSI IO 32 Request message structure */
-/****************************************************************************/
-
-typedef struct _MSG_SCSI_IO32_REQUEST
-{
- U8 TargetID; /* 00h */
- U8 Bus; /* 01h */
- U8 ChainOffset; /* 02h */
- U8 Function; /* 03h */
- U8 CDBLength; /* 04h */
- U8 SenseBufferLength; /* 05h */
- U8 Reserved; /* 06h */
- U8 MsgFlags; /* 07h */
- U32 MsgContext; /* 08h */
- U8 LUN[8]; /* 0Ch */
- U32 Control; /* 14h */
- U8 CDB[32]; /* 18h */
- U32 DataLength; /* 38h */
- U32 SenseBufferLowAddr; /* 3Ch */
- SGE_IO_UNION SGL; /* 40h */
-} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
- SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
-
-/* SCSI IO 32 uses the same defines as above for SCSI IO */
+#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************/
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
+#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
/* MsgFlags bits */
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
- U8 Reserved; /* 04h */
+ U8 ResponseCode; /* 04h */
U8 TaskType; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
+/* ResponseCode values */
+#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
+#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
+#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
+#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
+#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
+#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
+#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
+
/****************************************************************************/
/* SCSI Enclosure Processor messages */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
- U8 Reserved1; /* 05h */
- U8 Reserved2; /* 06h */
+ U8 Flags; /* 05h */
+ U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 SlotStatus; /* 0Ch */
+ U32 Reserved2; /* 10h */
+ U32 Reserved3; /* 14h */
+ U32 Reserved4; /* 18h */
+ U16 Slot; /* 1Ch */
+ U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
SEPRequest_t, MPI_POINTER pSEPRequest_t;
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
+/* Flags defines */
+#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
+#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
+
/* SlotStatus bits for MSG_SEP_REQUEST */
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 SlotStatus; /* 14h */
+ U32 Reserved4; /* 18h */
+ U16 Slot; /* 1Ch */
+ U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
SEPReply_t, MPI_POINTER pSEPReply_t;
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2005 LSI Logic Corporation.
*
*
* Name: mpi_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: August 11, 2000
*
- * mpi_ioc.h Version: 01.05.xx
+ * mpi_ioc.h Version: 01.05.08
*
* Version History
* ---------------
* Added AliasIndex to EVENT_DATA_LOGOUT structure.
* 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
* 06-26-03 01.02.08 Added new values to the product family defines.
+ * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
+ * added related defines.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
+ * Added three new fields to MSG_IOC_FACTS_REPLY.
+ * Defined four new bits for the IOCCapabilities field of
+ * the IOCFacts reply.
+ * Added two new PortTypes for the PortFacts reply.
+ * Added six new events along with their EventData
+ * structures.
+ * Added a new MsgFlag to the FwDownload request to
+ * indicate last segment.
+ * Defined a new image type of boot loader.
+ * Added FW family codes for SAS product families.
+ * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
+ * MSG_IOC_FACTS_REPLY.
+ * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
+ * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
+ * 01-15-05 01.05.05 Added event data for SAS SES Event.
+ * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
+ * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
+ * Reply and IOC Init Request.
+ * 03-11-05 01.05.08 Added family code for 1068E family.
+ * Removed IOCFacts Reply EEDP Capability bit.
* --------------------------------------------------------------------------
*/
U32 HostMfaHighAddr; /* 10h */
U32 SenseBufferHighAddr; /* 14h */
U32 ReplyFifoHostSignalingAddr; /* 18h */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
+ U16 MsgVersion; /* 28h */
+ U16 HeaderVersion; /* 2Ah */
} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
IOCInit_t, MPI_POINTER pIOCInit_t;
/* WhoInit values */
-#define MPI_WHOINIT_NO_ONE (0x00)
-#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
-#define MPI_WHOINIT_ROM_BIOS (0x02)
-#define MPI_WHOINIT_PCI_PEER (0x03)
-#define MPI_WHOINIT_HOST_DRIVER (0x04)
-#define MPI_WHOINIT_MANUFACTURER (0x05)
+#define MPI_WHOINIT_NO_ONE (0x00)
+#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
+#define MPI_WHOINIT_ROM_BIOS (0x02)
+#define MPI_WHOINIT_PCI_PEER (0x03)
+#define MPI_WHOINIT_HOST_DRIVER (0x04)
+#define MPI_WHOINIT_MANUFACTURER (0x05)
/* Flags values */
-#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
-#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
+#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
+
+/* MsgVersion */
+#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
+#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
+
+/* HeaderVersion */
+#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
+#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
+
typedef struct _MSG_IOC_INIT_REPLY
{
MPI_FW_VERSION FWVersion; /* 38h */
U16 HighPriorityQueueDepth; /* 3Ch */
U16 Reserved2; /* 3Eh */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
+ U32 ReplyFifoHostSignalingAddr; /* 4Ch */
} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
-#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
-#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
+#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
-#define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK (0xFF00)
-#define MPI_IOCFACTS_HEADERVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
+#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
-#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
-#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
-#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
-#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
+#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
+#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
+#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
+#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
-#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
+#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
+#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
-#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
-#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
+#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
+#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
-#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
-#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
-#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
-#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
-#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
-#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
-#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
+#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
+#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
+#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
+#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
+#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
+#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
#define MPI_EVENT_SAS_SES (0x00000010)
#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
+#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
+#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
/* AckRequired field values */
U8 ASCQ; /* 05h */
U16 DevHandle; /* 06h */
U32 DeviceInfo; /* 08h */
+ U16 ParentDevHandle; /* 0Ch */
+ U8 PhyNum; /* 0Eh */
+ U8 Reserved1; /* 0Fh */
+ U64 SASAddress; /* 10h */
} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
MpiEventDataSasDeviceStatusChange_t,
#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
+#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
+
/* SCSI Event data for Queue Full event */
} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
+/* MPI Integrated RAID Event data */
+
+typedef struct _EVENT_DATA_RAID
+{
+ U8 VolumeID; /* 00h */
+ U8 VolumeBus; /* 01h */
+ U8 ReasonCode; /* 02h */
+ U8 PhysDiskNum; /* 03h */
+ U8 ASC; /* 04h */
+ U8 ASCQ; /* 05h */
+ U16 Reserved; /* 06h */
+ U32 SettingsStatus; /* 08h */
+} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
+ MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+
+/* MPI Integrated RAID Event data ReasonCode values */
+#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
+#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
+#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
+#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
+#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
+#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
+#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
+#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
+#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
+#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
+#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
+#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+
/* MPI Link Status Change Event data */
typedef struct _EVENT_DATA_LINK_STATUS
#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
+/* SAS SES Event data */
-/* MPI Integrated RAID Event data */
-
-typedef struct _EVENT_DATA_RAID
+typedef struct _EVENT_DATA_SAS_SES
{
- U8 VolumeID; /* 00h */
- U8 VolumeBus; /* 01h */
- U8 ReasonCode; /* 02h */
- U8 PhysDiskNum; /* 03h */
- U8 ASC; /* 04h */
- U8 ASCQ; /* 05h */
- U16 Reserved; /* 06h */
- U32 SettingsStatus; /* 08h */
-} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
- MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+ U8 PhyNum; /* 00h */
+ U8 Port; /* 01h */
+ U8 PortWidth; /* 02h */
+ U8 Reserved1; /* 04h */
+} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
+ MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
-/* MPI Integrated RAID Event data ReasonCode values */
-#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
-#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
-#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
-#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
-#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
-#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
-#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
-#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
-#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
-#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
-#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
-#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+/* SAS Phy Link Status Event data */
+
+typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
+{
+ U8 PhyNum; /* 00h */
+ U8 LinkRates; /* 01h */
+ U16 DevHandle; /* 02h */
+ U64 SASAddress; /* 04h */
+} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
+ MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
+
+/* defines for the LinkRates field of the SAS PHY Link Status event */
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
+#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
+#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
+#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
+#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
+#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
+
+/* SAS Discovery Errror Event data */
+
+typedef struct _EVENT_DATA_DISCOVERY_ERROR
+{
+ U32 DiscoveryStatus; /* 00h */
+ U8 Port; /* 04h */
+ U8 Reserved1; /* 05h */
+ U16 Reserved2; /* 06h */
+} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
+ EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
+
+#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
+#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
+#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
/*****************************************************************************
} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
FWDownload_t, MPI_POINTER pFWDownload_t;
-#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
-#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
-#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
-#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
-#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
+#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
+
+#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
+#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
+#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
+#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
+#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
typedef struct _FWDownloadTCSGE
#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
+#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
typedef struct _FWUploadTCSGE
{
#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
+#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
/* SCSI */
#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
/* Fibre Channel */
#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
-#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
-#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
-#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003)
-#define MPI_FW_HEADER_PID_FAMILY_949_FC (0x0004)
+#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
+#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
+#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
+#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
/* SAS */
#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
+#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
+#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
+#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
typedef struct _MPI_EXT_IMAGE_HEADER
{
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2004 LSI Logic Corporation.
*
*
* Name: mpi_lan.h
* Title: MPI LAN messages and structures
* Creation Date: June 30, 2000
*
- * mpi_lan.h Version: 01.05.xx
+ * mpi_lan.h Version: 01.05.01
*
* Version History
* ---------------
* 02-20-01 01.01.02 Started using MPI_POINTER.
* 03-27-01 01.01.03 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
/*
- * Copyright (c) 2001-2003 LSI Logic Corporation.
+ * Copyright (c) 2001-2005 LSI Logic Corporation.
*
*
* Name: mpi_raid.h
* Title: MPI RAID message and structures
* Creation Date: February 27, 2001
*
- * mpi_raid.h Version: 01.05.xx
+ * mpi_raid.h Version: 01.05.02
*
* Version History
* ---------------
* 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
* 04-01-03 01.02.09 New action data option flag for
* MPI_RAID_ACTION_DELETE_VOLUME.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 01-15-05 01.05.02 Added defines for the two new RAID Actions for
+ * _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
* --------------------------------------------------------------------------
*/
#define MPI_RAID_ACTION_REPLACE_PHYSDISK (0x10)
#define MPI_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI_RAID_ACTION_INACTIVATE_VOLUME (0x12)
+#define MPI_RAID_ACTION_SET_RESYNC_RATE (0x13)
+#define MPI_RAID_ACTION_SET_DATA_SCRUB_RATE (0x14)
/* ActionDataWord defines for use with MPI_RAID_ACTION_CREATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_DO_NOT_SYNC (0x00000001)
/* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_INACTIVATE_ALL (0x00000001)
+/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_RESYNC_RATE action */
+#define MPI_RAID_ACTION_ADATA_RESYNC_RATE_MASK (0x000000FF)
+
+/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_DATA_SCRUB_RATE action */
+#define MPI_RAID_ACTION_ADATA_DATA_SCRUB_RATE_MASK (0x000000FF)
+
+
/* RAID Action reply message */
/*
- * Copyright (c) 2003 LSI Logic Corporation.
+ * Copyright (c) 2004 LSI Logic Corporation.
*
*
* Name: mpi_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
- * Creation Date: April 23, 2003
+ * Creation Date: August 19, 2004
*
- * mpi_sas.h Version: 01.05.xx
+ * mpi_sas.h Version: 01.05.01
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
- * xx-yy-zz 01.05.01 Original release.
+ * 08-19-04 01.05.01 Original release.
* --------------------------------------------------------------------------
*/
#ifndef MPI_SAS_H
#define MPI_SAS_H
+
+/*
+ * Values for SASStatus.
+ */
+#define MPI_SASSTATUS_SUCCESS (0x00)
+#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
+#define MPI_SASSTATUS_INVALID_FRAME (0x02)
+#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
+#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
+#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
+#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
+#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
+#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
+#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
+#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
+#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
+#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
+#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
+#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
+#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
+#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
+#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
+#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
+#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
+#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
+
+
+/*
+ * Values for the SAS DeviceInfo field used in SAS Device Status Change Event
+ * data and SAS IO Unit Configuration pages.
+ */
+#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
+#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
+#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
+#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
+#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
+#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
+#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
+#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
+#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
+#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
+#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
+
+#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
+#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
+#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
+#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
+#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
+
+
+
/*****************************************************************************
*
* S e r i a l A t t a c h e d S C S I M e s s a g e s
} MSG_SMP_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REQUEST,
SmpPassthroughRequest_t, MPI_POINTER pSmpPassthroughRequest_t;
+/* values for PassthroughFlags field */
#define MPI_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
+/* values for ConnectionRate field */
#define MPI_SMP_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
#define MPI_SMP_PT_REQ_CONNECT_RATE_1_5 (0x08)
#define MPI_SMP_PT_REQ_CONNECT_RATE_3_0 (0x09)
#define MPI_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
-/* values for the SASStatus field */
-#define MPI_SASSTATUS_SUCCESS (0x00)
-#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
-#define MPI_SASSTATUS_INVALID_FRAME (0x02)
-#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
-#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
-#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
-#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
-#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
-#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
-#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
-#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
-#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
-#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
-#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
-#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
-#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
-#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
-#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
-#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
-#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
-#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
+/****************************************************************************/
+/* SATA Passthrough Request */
+/****************************************************************************/
+
+typedef struct _MSG_SATA_PASSTHROUGH_REQUEST
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 PassthroughFlags; /* 04h */
+ U8 ConnectionRate; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U32 Reserved2; /* 10h */
+ U32 Reserved3; /* 14h */
+ U32 DataLength; /* 18h */
+ U8 CommandFIS[20]; /* 1Ch */
+ SGE_SIMPLE_UNION SGL; /* 30h */
+} MSG_SATA_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REQUEST,
+ SataPassthroughRequest_t, MPI_POINTER pSataPassthroughRequest_t;
+
+/* values for PassthroughFlags field */
+#define MPI_SATA_PT_REQ_PT_FLAGS_RESET_DEVICE (0x0200)
+#define MPI_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
+#define MPI_SATA_PT_REQ_PT_FLAGS_DMA_QUEUED (0x0080)
+#define MPI_SATA_PT_REQ_PT_FLAGS_PACKET_COMMAND (0x0040)
+#define MPI_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
+#define MPI_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
+#define MPI_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
+#define MPI_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
+#define MPI_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
+
+/* values for ConnectionRate field */
+#define MPI_SATA_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
+#define MPI_SATA_PT_REQ_CONNECT_RATE_1_5 (0x08)
+#define MPI_SATA_PT_REQ_CONNECT_RATE_3_0 (0x09)
+
+
+/* SATA Passthrough Reply */
+typedef struct _MSG_SATA_PASSTHROUGH_REPLY
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 PassthroughFlags; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2; /* 0Ch */
+ U8 SASStatus; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U8 StatusFIS[20]; /* 14h */
+ U32 StatusControlRegisters; /* 28h */
+ U32 TransferCount; /* 2Ch */
+} MSG_SATA_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REPLY,
+ SataPassthroughReply_t, MPI_POINTER pSataPassthroughReply_t;
-/*
- * Values for the SAS DeviceInfo field used in SAS Device Status Change Event
- * data and SAS IO Unit Configuration pages.
- */
-#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
-#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
-#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
-#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
-#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
-#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
-#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
-#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
-#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
-#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
-#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
-#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
-#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
-#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
-#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
-#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/****************************************************************************/
} MSG_SAS_IOUNIT_CONTROL_REQUEST, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REQUEST,
SasIoUnitControlRequest_t, MPI_POINTER pSasIoUnitControlRequest_t;
-/* values for the ... field */
+/* values for the Operation field */
#define MPI_SAS_OP_CLEAR_NOT_PRESENT (0x01)
-#define MPI_SAS_OP_CLEAR_ALL (0x02)
-#define MPI_SAS_OP_MAP (0x03)
-#define MPI_SAS_OP_MOVE (0x04)
-#define MPI_SAS_OP_CLEAR (0x05)
+#define MPI_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
+#define MPI_SAS_OP_MAP_CURRENT (0x09)
/* SAS IO Unit Control Reply */
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2004 LSI Logic Corporation.
*
*
* Name: mpi_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: June 22, 2000
*
- * mpi_targ.h Version: 01.05.xx
+ * mpi_targ.h Version: 01.05.04
*
* Version History
* ---------------
* Added PRIORITY_REASON_TARGET_BUSY.
* 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
* 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added new request message structures for
+ * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
+ * MSG_TARGET_ASSIST_EXT_REQUEST.
+ * Added new structures for SAS SSP Command buffer, SSP
+ * Task buffer, and SSP Status IU.
+ * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
+ * 02-22-05 01.05.03 Changed a comment.
+ * 03-11-05 01.05.04 Removed TargetAssistExtended Request.
* --------------------------------------------------------------------------
*/
} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
+
+typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
+{
+ U16 Reserved; /* 00h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 PriorityReason; /* 0Ch */
+ U8 Reserved3; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 ReplyWord; /* 14h */
+} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
+ TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
+
#define PRIORITY_REASON_NO_DISCONNECT (0x00)
#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
#define PRIORITY_REASON_UNKNOWN (0xFF)
-typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
+/****************************************************************************/
+/* Target Command Buffer Post Base Request */
+/****************************************************************************/
+
+typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST
+{
+ U8 BufferPostFlags; /* 00h */
+ U8 PortNumber; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 TotalCmdBuffers; /* 04h */
+ U8 Reserved; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U16 CmdBufferLength; /* 10h */
+ U16 NextCmdBufferOffset; /* 12h */
+ U32 BaseAddressLow; /* 14h */
+ U32 BaseAddressHigh; /* 18h */
+} MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ TargetCmdBufferPostBaseRequest_t,
+ MPI_POINTER pTargetCmdBufferPostBaseRequest_t;
+
+#define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
+
+
+typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
- U8 PriorityReason; /* 0Ch */
- U8 Reserved3; /* 0Dh */
+ U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
- U32 ReplyWord; /* 14h */
-} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
- MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
- TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
+} MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
+ TargetCmdBufferPostBaseListReply_t,
+ MPI_POINTER pTargetCmdBufferPostBaseListReply_t;
+
+
+/****************************************************************************/
+/* Target Command Buffer Post List Request */
+/****************************************************************************/
+
+typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST
+{
+ U8 Reserved; /* 00h */
+ U8 PortNumber; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 CmdBufferCount; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U16 IoIndex[2]; /* 10h */
+} MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
+ TargetCmdBufferPostListRequest_t,
+ MPI_POINTER pTargetCmdBufferPostListRequest_t;
+/****************************************************************************/
+/* Command Buffer Formats (with 16 byte CDB) */
+/****************************************************************************/
+
typedef struct _MPI_TARGET_FCP_CMD_BUFFER
{
U8 FcpLun[8]; /* 00h */
MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
+typedef struct _MPI_TARGET_SSP_CMD_BUFFER
+{
+ U8 FrameType; /* 00h */
+ U8 Reserved1; /* 01h */
+ U16 Reserved2; /* 02h */
+ U16 InitiatorTag; /* 04h */
+ U16 DevHandle; /* 06h */
+ /* COMMAND information unit starts here */
+ U8 LogicalUnitNumber[8]; /* 08h */
+ U8 Reserved3; /* 10h */
+ U8 TaskAttribute; /* lower 3 bits */ /* 11h */
+ U8 Reserved4; /* 12h */
+ U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */
+ U8 CDB[16]; /* 14h */
+ /* Additional CDB bytes extend past the CDB field */
+} MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER,
+ MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer;
+
+typedef struct _MPI_TARGET_SSP_TASK_BUFFER
+{
+ U8 FrameType; /* 00h */
+ U8 Reserved1; /* 01h */
+ U16 Reserved2; /* 02h */
+ U16 InitiatorTag; /* 04h */
+ U16 DevHandle; /* 06h */
+ /* TASK information unit starts here */
+ U8 LogicalUnitNumber[8]; /* 08h */
+ U8 Reserved3; /* 10h */
+ U8 Reserved4; /* 11h */
+ U8 TaskManagementFunction; /* 12h */
+ U8 Reserved5; /* 13h */
+ U16 ManagedTaskTag; /* 14h */
+ U16 Reserved6; /* 16h */
+ U32 Reserved7; /* 18h */
+ U32 Reserved8; /* 1Ch */
+ U32 Reserved9; /* 20h */
+} MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER,
+ MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer;
+
+
/****************************************************************************/
/* Target Assist Request */
/****************************************************************************/
} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
+/*
+ * NOTE: The SSP status IU is big-endian. When used on a little-endian system,
+ * this structure properly orders the bytes.
+ */
+typedef struct _MPI_TARGET_SSP_RSP_IU
+{
+ U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */
+ /* start of RESPONSE information unit */
+ U32 Reserved1; /* 18h */
+ U32 Reserved2; /* 1Ch */
+ U16 Reserved3; /* 20h */
+ U8 DataPres; /* lower 2 bits */ /* 22h */
+ U8 Status; /* 23h */
+ U32 Reserved4; /* 24h */
+ U32 SenseDataLength; /* 28h */
+ U32 ResponseDataLength; /* 2Ch */
+ U8 ResponseSenseData[4]; /* 30h */
+} MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU,
+ MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;
+
+
/****************************************************************************/
/* Target Mode Abort Request */
/****************************************************************************/
/*
- * Copyright (c) 2001-2003 LSI Logic Corporation.
+ * Copyright (c) 2001-2005 LSI Logic Corporation.
*
*
* Name: mpi_tool.h
* Title: MPI Toolbox structures and definitions
* Creation Date: July 30, 2001
*
- * mpi_tool.h Version: 01.05.xx
+ * mpi_tool.h Version: 01.05.03
*
* Version History
* ---------------
* -------- -------- ------------------------------------------------------
* 08-08-01 01.02.01 Original release.
* 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
+ * 01-16-04 01.02.03 Added defines and structures for new tools
+ *. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
+ * MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
+ * 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
+ * Diagnostic Release requests and replies.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
+ * 02-09-05 01.05.03 Added frame size option to FC management tool.
+ * Added Beacon tool to the Toolbox.
* --------------------------------------------------------------------------
*/
#define MPI_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI_TOOLBOX_FC_MANAGEMENT_TOOL (0x04)
+#define MPI_TOOLBOX_BEACON_TOOL (0x05)
/****************************************************************************/
} MPI_TB_FC_MANAGE_PID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_PID_AI,
MpiTbFcManagePidAi_t, MPI_POINTER pMpiTbFcManagePidAi_t;
+/* ActionInfo for set max frame size */
+typedef struct _MPI_TB_FC_MANAGE_FRAME_SIZE_AI
+{
+ U16 FrameSize; /* 00h */
+ U8 PortNum; /* 02h */
+ U8 Reserved1; /* 03h */
+} MPI_TB_FC_MANAGE_FRAME_SIZE_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_FRAME_SIZE_AI,
+ MpiTbFcManageFrameSizeAi_t, MPI_POINTER pMpiTbFcManageFrameSizeAi_t;
+
/* union of ActionInfo */
typedef union _MPI_TB_FC_MANAGE_AI_UNION
{
MPI_TB_FC_MANAGE_BUS_TID_AI BusTid;
MPI_TB_FC_MANAGE_PID_AI Port;
+ MPI_TB_FC_MANAGE_FRAME_SIZE_AI FrameSize;
} MPI_TB_FC_MANAGE_AI_UNION, MPI_POINTER PTR_MPI_TB_FC_MANAGE_AI_UNION,
MpiTbFcManageAiUnion_t, MPI_POINTER pMpiTbFcManageAiUnion_t;
#define MPI_TB_FC_MANAGE_ACTION_DISC_ALL (0x00)
#define MPI_TB_FC_MANAGE_ACTION_DISC_PID (0x01)
#define MPI_TB_FC_MANAGE_ACTION_DISC_BUS_TID (0x02)
+#define MPI_TB_FC_MANAGE_ACTION_SET_MAX_FRAME_SIZE (0x03)
+
+
+/****************************************************************************/
+/* Toolbox Beacon Tool request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_BEACON_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 ConnectNum; /* 0Ch */
+ U8 PortNum; /* 0Dh */
+ U8 Reserved3; /* 0Eh */
+ U8 Flags; /* 0Fh */
+} MSG_TOOLBOX_BEACON_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_BEACON_REQUEST,
+ ToolboxBeaconRequest_t, MPI_POINTER pToolboxBeaconRequest_t;
+
+#define MPI_TOOLBOX_FLAGS_BEACON_MODE_OFF (0x00)
+#define MPI_TOOLBOX_FLAGS_BEACON_MODE_ON (0x01)
/****************************************************************************/
U32 ExtendedType; /* 0Ch */
U32 BufferLength; /* 10h */
U32 ProductSpecific[4]; /* 14h */
- U32 Reserved3; /* 18h */
- SGE_SIMPLE_UNION SGL; /* 28h */
+ U32 Reserved3; /* 24h */
+ U64 BufferAddress; /* 28h */
} MSG_DIAG_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REQUEST,
DiagBufferPostRequest_t, MPI_POINTER pDiagBufferPostRequest_t;
#define MPI_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI_DIAG_BUF_TYPE_EXTENDED (0x02)
+/* count of the number of buffer types */
+#define MPI_DIAG_BUF_TYPE_COUNT (0x03)
#define MPI_DIAG_EXTENDED_QTAG (0x00000001)
/*
- * Copyright (c) 2000-2003 LSI Logic Corporation.
+ * Copyright (c) 2000-2004 LSI Logic Corporation.
*
*
* Name: mpi_type.h
* Title: MPI Basic type definitions
* Creation Date: June 6, 2000
*
- * mpi_type.h Version: 01.05.xx
+ * mpi_type.h Version: 01.05.01
*
* Version History
* ---------------
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
* 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
typedef int32_t S32;
typedef u_int32_t U32;
-/*
- * The only way crap below could work on big-endian boxen would be if it
- * wasn't used at all.
- */
-
typedef struct _S64
{
U32 Low;
projects / profile / ivi / kernel-x86-ivi.git / commitdiff