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Enforce even float register pair for double register ops (Aurelien Jarno)
authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>
Fri, 6 Apr 2007 20:02:09 +0000 (20:02 +0000)
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>
Fri, 6 Apr 2007 20:02:09 +0000 (20:02 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162

target-sparc/translate.c patch | blob | history

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index cb11b92..34a3357 100644 (file)
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -90,7 +90,7 @@ enum {
 #ifdef TARGET_SPARC64
 #define DFPREG(r) (((r & 1) << 6) | (r & 0x1e))
 #else
-#define DFPREG(r) (r)
+#define DFPREG(r) (r & 0x1e)
 #endif
 
 #ifdef USE_DIRECT_JUMP
Domain: SDK / Emulator;