Op, DemandedBits, DemandedElts, DAG, Depth);
}
+bool X86TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
+ SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
+ bool PoisonOnly, unsigned Depth) const {
+ unsigned EltsBits = Op.getScalarValueSizeInBits();
+ unsigned NumElts = DemandedElts.getBitWidth();
+
+ // TODO: Add more target shuffles.
+ switch (Op.getOpcode()) {
+ case X86ISD::PSHUFD:
+ case X86ISD::VPERMILPI: {
+ SmallVector<int, 8> Mask;
+ DecodePSHUFMask(NumElts, EltsBits, Op.getConstantOperandVal(1), Mask);
+
+ APInt DemandedSrcElts = APInt::getZero(NumElts);
+ for (unsigned I = 0; I != NumElts; ++I)
+ if (DemandedElts[I])
+ DemandedSrcElts.setBit(Mask[I]);
+
+ return DAG.isGuaranteedNotToBeUndefOrPoison(
+ Op.getOperand(0), DemandedSrcElts, PoisonOnly, Depth + 1);
+ }
+ }
+ return TargetLowering::isGuaranteedNotToBeUndefOrPoisonForTargetNode(
+ Op, DemandedElts, DAG, PoisonOnly, Depth);
+}
+
+bool X86TargetLowering::canCreateUndefOrPoisonForTargetNode(
+ SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
+ bool PoisonOnly, bool ConsiderFlags, unsigned Depth) const {
+
+ // TODO: Add more target shuffles.
+ switch (Op.getOpcode()) {
+ case X86ISD::PSHUFD:
+ case X86ISD::VPERMILPI:
+ return false;
+ }
+ return TargetLowering::canCreateUndefOrPoisonForTargetNode(
+ Op, DemandedElts, DAG, PoisonOnly, ConsiderFlags, Depth);
+}
+
bool X86TargetLowering::isSplatValueForTargetNode(SDValue Op,
const APInt &DemandedElts,
APInt &UndefElts,
SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
SelectionDAG &DAG, unsigned Depth) const override;
+ bool isGuaranteedNotToBeUndefOrPoisonForTargetNode(
+ SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
+ bool PoisonOnly, unsigned Depth) const override;
+
+ bool canCreateUndefOrPoisonForTargetNode(
+ SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
+ bool PoisonOnly, bool ConsiderFlags, unsigned Depth) const override;
+
bool isSplatValueForTargetNode(SDValue Op, const APInt &DemandedElts,
APInt &UndefElts,
unsigned Depth) const override;
define <4 x i32> @freeze_pshufd(<4 x i32> %a0) nounwind {
; CHECK-LABEL: freeze_pshufd:
; CHECK: # %bb.0:
-; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
-; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
; CHECK-NEXT: ret{{[l|q]}}
%x = shufflevector <4 x i32> %a0, <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
%y = freeze <4 x i32> %x
define <4 x float> @freeze_permilps(<4 x float> %a0) nounwind {
; CHECK-LABEL: freeze_permilps:
; CHECK: # %bb.0:
-; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
-; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
; CHECK-NEXT: ret{{[l|q]}}
%x = shufflevector <4 x float> %a0, <4 x float> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
%y = freeze <4 x float> %x