ARM: dts: stm32: add uart nodes on stm32mp13
authorValentin Caron <valentin.caron@foss.st.com>
Tue, 28 Mar 2023 15:37:21 +0000 (17:37 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Tue, 28 Mar 2023 15:50:23 +0000 (17:50 +0200)
Update device-tree stm32mp131.dtsi to add some uart features.

On uart 1, 2, 3, 5, 6, 7, 8 nodes, add compabible, exti interrupts, clock,
reset properties, dma config.

On uart 4 node, only add dma configuration and use exti interrupt.

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/stm32mp131.dtsi

index 5949473..9ea6168 100644 (file)
                        status = "disabled";
                };
 
+               usart3: serial@4000f000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x4000f000 0x400>;
+                       interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc USART3_K>;
+                       resets = <&rcc USART3_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 45 0x400 0x5>,
+                              <&dmamux1 46 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                uart4: serial@40010000 {
                        compatible = "st,stm32h7-uart";
                        reg = <0x40010000 0x400>;
-                       interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&rcc UART4_K>;
                        resets = <&rcc UART4_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 63 0x400 0x5>,
+                              <&dmamux1 64 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               uart5: serial@40011000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x40011000 0x400>;
+                       interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc UART5_K>;
+                       resets = <&rcc UART5_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 65 0x400 0x5>,
+                              <&dmamux1 66 0x400 0x1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
                        status = "disabled";
                };
 
+               uart7: serial@40018000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x40018000 0x400>;
+                       interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc UART7_K>;
+                       resets = <&rcc UART7_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 79 0x400 0x5>,
+                              <&dmamux1 80 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               uart8: serial@40019000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x40019000 0x400>;
+                       interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc UART8_K>;
+                       resets = <&rcc UART8_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 81 0x400 0x5>,
+                              <&dmamux1 82 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                timers1: timer@44000000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        };
                };
 
+               usart6: serial@44003000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x44003000 0x400>;
+                       interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc USART6_K>;
+                       resets = <&rcc USART6_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 71 0x400 0x5>,
+                              <&dmamux1 72 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                i2s1: audio-controller@44004000 {
                        compatible = "st,stm32h7-i2s";
                        reg = <0x44004000 0x400>;
                        status = "disabled";
                };
 
+               usart1: serial@4c000000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x4c000000 0x400>;
+                       interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc USART1_K>;
+                       resets = <&rcc USART1_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 41 0x400 0x5>,
+                              <&dmamux1 42 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               usart2: serial@4c001000 {
+                       compatible = "st,stm32h7-uart";
+                       reg = <0x4c001000 0x400>;
+                       interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc USART2_K>;
+                       resets = <&rcc USART2_R>;
+                       wakeup-source;
+                       dmas = <&dmamux1 43 0x400 0x5>,
+                              <&dmamux1 44 0x400 0x1>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                i2s4: audio-controller@4c002000 {
                        compatible = "st,stm32h7-i2s";
                        reg = <0x4c002000 0x400>;