VGATHERDPD ymmreg,mem32,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
VGATHERQPD ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
+;# Intel BMI1 and BMI2 instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+TZCNT reg16,rm16 \320\333\2\x0F\xBC\110 FUTURE,BMI1
+TZCNT reg32,rm32 \321\333\2\x0F\xBC\110 FUTURE,BMI1
+TZCNT reg64,rm64 \324\333\2\x0F\xBC\110 X64,FUTURE,BMI1
+ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1
+ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] X64,FUTURE,BMI1
+BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1
+BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] X64,FUTURE,BMI1
+
+; there's something strange with the BLS commands...
+; BLSI reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1
+; BLSI reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /3] X64,FUTURE,BMI1
+; BLSMSK reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1
+; BLSMSK reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /2] X64,FUTURE,BMI1
+; BLSR reg32,rm32 [rmv: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1
+; BLSR reg64,rm64 [rmv: vex.ndd.lz.0f38.w1 f3 /1] X64,FUTURE,BMI1
+
+BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2
+BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] X64,FUTURE,BMI2
+MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2
+MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] X64,FUTURE,BMI2
+PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2
+PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] X64,FUTURE,BMI2
+PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2
+PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] X64,FUTURE,BMI2
+RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2
+RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] X64,FUTURE,BMI2
+SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2
+SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] X64,FUTURE,BMI2
+SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2
+SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] X64,FUTURE,BMI2
+SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2
+SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] X64,FUTURE,BMI2
+
;# Systematic names for the hinting nop instructions
; These should be last in the file
HINT_NOP0 rm16 \320\2\x0F\x18\200 P6,UNDOC