+2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
+
+ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR>
+ <R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p'
+ or misaligned.
+
2017-02-23 Alan Modra <amodra@gmail.com>
PR 20744
when the symbol does not resolve locally. */
if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root))
return bfd_reloc_continue;
+ /* We can't optimize cross-mode jumps either. */
+ if (*cross_mode_jump_p)
+ return bfd_reloc_continue;
value = symbol + addend;
+ /* Neither we can non-instruction-aligned targets. */
+ if (r_type == R_MIPS_JALR ? (value & 3) != 0 : (value & 1) == 0)
+ return bfd_reloc_continue;
break;
case R_MIPS_PJUMP:
+2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/gas/mips/jalr4.d: New test.
+ * testsuite/gas/mips/jalr4-n32.d: New test.
+ * testsuite/gas/mips/jalr4-n64.d: New test.
+ * testsuite/gas/mips/jalr4.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com>
Add support for associating SPARC ASIs with an architecture level.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS JALR reloc unaligned/cross-mode (n32)
+#as: -n32
+#source: jalr4.s
+#dump: jalr4.d
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS JALR reloc unaligned/cross-mode (n64)
+#as: -64
+#source: jalr4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar0
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar1
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar1
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar2
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar2
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
+[0-9a-f]+ <[^>]*> 00000000 nop
+ \.\.\.
+ \.\.\.
+ \.\.\.
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS JALR reloc unaligned/cross-mode (o32)
+#as: -32
+#source: jalr4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar2
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
+[ ]*[0-9a-f]+: R_MIPS_JALR bar2
+[0-9a-f]+ <[^>]*> 00000000 nop
+ \.\.\.
+ \.\.\.
+ \.\.\.
+ \.\.\.
--- /dev/null
+ .abicalls
+ .text
+
+ .align 2
+ .globl foo
+ .ent foo
+foo:
+ .reloc 1f, R_MIPS_JALR, bar0
+1: jalr $25
+ .reloc 1f, R_MIPS_JALR, bar0
+1: jr $25
+ .reloc 1f, R_MIPS_JALR, bar1
+1: jalr $25
+ .reloc 1f, R_MIPS_JALR, bar1
+1: jr $25
+ .reloc 1f, R_MIPS_JALR, bar2
+1: jalr $25
+ .reloc 1f, R_MIPS_JALR, bar2
+1: jr $25
+ .end foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
+
+ .align 2
+ .globl bar0
+ .ent bar0
+bar0:
+ .insn
+ .end bar0
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
+
+ .align 2
+ .globl bar1
+ .ent bar1
+ .space 2
+bar1:
+ .insn
+ .end bar1
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
+
+ .set mips64r2
+ .set mips16
+ .align 2
+ .globl bar2
+ .ent bar2
+ .byte 0
+bar2:
+ .insn
+ .end bar2
+ .set nomips16
+ .set mips0
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
run_dump_test "jalr2"
run_dump_test_arches "jalr3" [mips_arch_list_matching mips1 \
!micromips]
+ run_dump_test_arches "jalr4" [mips_arch_list_matching mips1 \
+ !micromips]
if $has_newabi {
run_dump_test_arches "jalr3-n32" \
[mips_arch_list_matching mips3 \
!micromips]
+ run_dump_test_arches "jalr4-n32" \
+ [mips_arch_list_matching mips3 \
+ !micromips]
run_dump_test_arches "jalr3-n64" \
[mips_arch_list_matching mips3 \
!micromips]
+ run_dump_test_arches "jalr4-n64" \
+ [mips_arch_list_matching mips3 \
+ !micromips]
}
run_dump_test_arches "aent" [mips_arch_list_matching mips1]
+2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
+
+ * testsuite/ld-mips-elf/jalr4.dd: New test.
+ * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
+
2017-02-23 Alan Modra <amodra@gmail.com>
PR 20744
--- /dev/null
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0411000f bal 0+000040 <bar0>
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 1000000d b 0+000040 <bar0>
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 03200008 jr t9
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 0320f809 jalr t9
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 03200008 jr t9
+[0-9a-f]+ <[^>]*> 00000000 nop
+ \.\.\.
+ \.\.\.
+ \.\.\.
+ \.\.\.
"$abi_asflags($abi)" \
[list ../../../gas/testsuite/gas/mips/jalr3.s] \
[list "objdump -d jalr3.dd"] \
- "jalr3-${abi}"]]
+ "jalr3-${abi}"] \
+ [list \
+ "MIPS JALR reloc unaligned/cross-mode link test ($abi)" \
+ "$abi_ldflags($abi) -T jalr3.ld" "" \
+ "$abi_asflags($abi)" \
+ [list ../../../gas/testsuite/gas/mips/jalr4.s] \
+ [list "objdump {-d --prefix-addresses --show-raw-insn} jalr4.dd"] \
+ "jalr4-${abi}"]]
}
proc build_mips_plt_lib { abi } {