net: dsa: qca8k: add additional MIB counter and make it dynamic
authorAnsuel Smith <ansuelsmth@gmail.com>
Mon, 22 Nov 2021 15:23:45 +0000 (16:23 +0100)
committerDavid S. Miller <davem@davemloft.net>
Mon, 22 Nov 2021 15:35:16 +0000 (15:35 +0000)
We are currently missing 2 additionals MIB counter present in QCA833x
switch.
QC832x switch have 39 MIB counter and QCA833X have 41 MIB counter.
Add the additional MIB counter and rework the MIB function to print the
correct supported counter from the match_data struct.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/qca8k.c
drivers/net/dsa/qca8k.h

index d64a9af..bedaaa6 100644 (file)
@@ -70,6 +70,8 @@ static const struct qca8k_mib_desc ar8327_mib[] = {
        MIB_DESC(1, 0x9c, "TxExcDefer"),
        MIB_DESC(1, 0xa0, "TxDefer"),
        MIB_DESC(1, 0xa4, "TxLateCol"),
+       MIB_DESC(1, 0xa8, "RXUnicast"),
+       MIB_DESC(1, 0xac, "TXUnicast"),
 };
 
 /* The 32bit switch registers are accessed indirectly. To achieve this we need
@@ -1601,12 +1603,16 @@ qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode,
 static void
 qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data)
 {
+       const struct qca8k_match_data *match_data;
+       struct qca8k_priv *priv = ds->priv;
        int i;
 
        if (stringset != ETH_SS_STATS)
                return;
 
-       for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++)
+       match_data = of_device_get_match_data(priv->dev);
+
+       for (i = 0; i < match_data->mib_count; i++)
                strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
                        ETH_GSTRING_LEN);
 }
@@ -1616,12 +1622,15 @@ qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,
                        uint64_t *data)
 {
        struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+       const struct qca8k_match_data *match_data;
        const struct qca8k_mib_desc *mib;
        u32 reg, i, val;
        u32 hi = 0;
        int ret;
 
-       for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
+       match_data = of_device_get_match_data(priv->dev);
+
+       for (i = 0; i < match_data->mib_count; i++) {
                mib = &ar8327_mib[i];
                reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset;
 
@@ -1644,10 +1653,15 @@ qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,
 static int
 qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset)
 {
+       const struct qca8k_match_data *match_data;
+       struct qca8k_priv *priv = ds->priv;
+
        if (sset != ETH_SS_STATS)
                return 0;
 
-       return ARRAY_SIZE(ar8327_mib);
+       match_data = of_device_get_match_data(priv->dev);
+
+       return match_data->mib_count;
 }
 
 static int
@@ -2150,14 +2164,17 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
 static const struct qca8k_match_data qca8327 = {
        .id = QCA8K_ID_QCA8327,
        .reduced_package = true,
+       .mib_count = QCA8K_QCA832X_MIB_COUNT,
 };
 
 static const struct qca8k_match_data qca8328 = {
        .id = QCA8K_ID_QCA8327,
+       .mib_count = QCA8K_QCA832X_MIB_COUNT,
 };
 
 static const struct qca8k_match_data qca833x = {
        .id = QCA8K_ID_QCA8337,
+       .mib_count = QCA8K_QCA833X_MIB_COUNT,
 };
 
 static const struct of_device_id qca8k_of_match[] = {
index 0858852..91c94df 100644 (file)
@@ -21,6 +21,9 @@
 #define PHY_ID_QCA8337                                 0x004dd036
 #define QCA8K_ID_QCA8337                               0x13
 
+#define QCA8K_QCA832X_MIB_COUNT                                39
+#define QCA8K_QCA833X_MIB_COUNT                                41
+
 #define QCA8K_BUSY_WAIT_TIMEOUT                                2000
 
 #define QCA8K_NUM_FDB_RECORDS                          2048
@@ -279,6 +282,7 @@ struct ar8xxx_port_status {
 struct qca8k_match_data {
        u8 id;
        bool reduced_package;
+       u8 mib_count;
 };
 
 enum {