clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
clock-output-names = "gmac_tx";
};
+ };
- /*
- * Dummy clock used by output clocks
- */
- osc24M_32k: clk@1 {
- #clock-cells = <0>;
- compatible = "fixed-factor-clock";
- clock-div = <750>;
- clock-mult = <1>;
- clocks = <&osc24M>;
- clock-output-names = "osc24M_32k";
- };
+
- clk_out_a: clk@1c201f0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-out-clk";
- reg = <0x01c201f0 0x4>;
- clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
- clock-output-names = "clk_out_a";
- };
-
- clk_out_b: clk@1c201f4 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-out-clk";
- reg = <0x01c201f4 0x4>;
- clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
- clock-output-names = "clk_out_b";
- };
+ de: display-engine {
+ compatible = "allwinner,sun7i-a20-display-engine";
+ allwinner,pipelines = <&fe0>, <&fe1>;
+ status = "disabled";
};
soc@1c00000 {