media: dt-bindings: Update bindings for Cadence CSI2TX version 2.1
authorJan Kotas <jank@cadence.com>
Mon, 22 Jul 2019 08:22:20 +0000 (04:22 -0400)
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Thu, 25 Jul 2019 10:42:16 +0000 (06:42 -0400)
This patch adds a DT bindings documentation for
Cadence CSI2TX v2.1 controller.

Signed-off-by: Jan Kotas <jank@cadence.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Documentation/devicetree/bindings/media/cdns,csi2tx.txt

index 459c6e3..751b9ed 100644 (file)
@@ -5,7 +5,8 @@ The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
 4 CSI lanes in output, and up to 4 different pixel streams in input.
 
 Required properties:
-  - compatible: must be set to "cdns,csi2tx"
+  - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
+    for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
   - reg: base address and size of the memory mapped region
   - clocks: phandles to the clocks driving the controller
   - clock-names: must contain: