drm/amd/display: Secondary display goes blank on Non DCN31
authorAhmad Othman <Ahmad.Othman@amd.com>
Mon, 1 Nov 2021 16:07:00 +0000 (12:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 22 Nov 2021 19:45:01 +0000 (14:45 -0500)
[Why]
Due to integration issues with branch merging,
a regression happened that prevented secondary
displays from lighting up or enabling certain features

[How]
Separated the new logic to be for DCN31 only and retained
pre DCN31 logic for all other ASICs

Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Ahmad Othman <Ahmad.Othman@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c

index 2e2dcd5..8a8a5ae 100644 (file)
@@ -3997,7 +3997,8 @@ static void update_psp_stream_config(struct pipe_ctx *pipe_ctx, bool dpms_off)
                        config.phy_idx = link_enc->transmitter - TRANSMITTER_UNIPHY_A;
 
                        // Add flag to guard new A0 DIG mapping
-                       if (pipe_ctx->stream->ctx->dc->enable_c20_dtm_b0 == true) {
+                       if (pipe_ctx->stream->ctx->dc->enable_c20_dtm_b0 == true &&
+                                       pipe_ctx->stream->link->dc->ctx->dce_version == DCN_VERSION_3_1) {
                                config.dig_be = link_enc->preferred_engine;
                                config.dio_output_type = pipe_ctx->stream->link->ep_type;
                                config.dio_output_idx = link_enc->transmitter - TRANSMITTER_UNIPHY_A;