r600: Use nir_builder helpers for load/store_shared_r600

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24762>

diff --git a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp
index ac6babd..f78ca4b 100644 (file)
--- a/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_nir_lower_tess_io.cpp
@@ -277,17 +277,10 @@ emit_store_lds(nir_builder *b, nir_intrinsic_instr *op, nir_def *addr)
 
       uint32_t writemask = wmask >> nir_intrinsic_component(op);
 
-      auto store_tcs_out =
-         nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_local_shared_r600);
-      nir_intrinsic_set_write_mask(store_tcs_out, writemask);
-      store_tcs_out->src[0] = nir_src_for_ssa(op->src[0].ssa);
-      store_tcs_out->num_components = store_tcs_out->src[0].ssa->num_components;
       bool start_even = (orig_writemask & (1u << (2 * i)));
-
-      auto addr2 = nir_iadd_imm(b, addr, 8 * i + (start_even ? 0 : 4));
-      store_tcs_out->src[1] = nir_src_for_ssa(addr2);
-
-      nir_builder_instr_insert(b, &store_tcs_out->instr);
+      nir_def *addr2 = nir_iadd_imm(b, addr, 8 * i + (start_even ? 0 : 4));
+      nir_store_local_shared_r600(b, op->src[0].ssa, addr2,
+                                  .write_mask = writemask);
    }
 }
 
@@ -419,21 +412,16 @@ r600_lower_tess_io_impl(nir_builder *b, nir_instr *instr, enum mesa_prim prim_ty
       nir_def *addr_outer =
          nir_iadd(b, addr0, load_offset_group(b, tf_inner_address_offset + ncomps));
 
-      auto tf =
-         nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_local_shared_r600);
-      tf->num_components = ncomps;
-      tf->src[0] = nir_src_for_ssa(addr_outer);
-      nir_def_init(&tf->instr, &tf->def, tf->num_components, 32);
-      nir_builder_instr_insert(b, &tf->instr);
+      nir_def *tf = nir_load_local_shared_r600(b, 32, addr_outer);
       if (ncomps < 4 && b->shader->info.stage != MESA_SHADER_TESS_EVAL) {
          auto undef = nir_undef(b, 1, 32);
          nir_def *srcs[4] = {undef, undef, undef, undef};
          for (unsigned i = 0; i < ncomps; ++i)
-            srcs[i] = nir_channel(b, &tf->def, i);
+            srcs[i] = nir_channel(b, tf, i);
          auto help = nir_vec(b, srcs, 4);
          nir_def_rewrite_uses(&op->def, help);
       } else {
-         nir_def_rewrite_uses(&op->def, &tf->def);
+         nir_def_rewrite_uses(&op->def, tf);
       }
       nir_instr_remove(instr);
       return true;
@@ -523,13 +511,7 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type)
    nir_def *addr0 = r600_tcs_base_address(b, base, rel_patch_id);
 
    nir_def *addr_outer = nir_iadd(b, addr0, load_offset_group(b, outer_comps));
-   auto tf_outer =
-      nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_local_shared_r600);
-   tf_outer->num_components = outer_comps;
-   tf_outer->src[0] = nir_src_for_ssa(addr_outer);
-   nir_def_init(
-      &tf_outer->instr, &tf_outer->def, tf_outer->num_components, 32);
-   nir_builder_instr_insert(b, &tf_outer->instr);
+   nir_def *tf_outer = nir_load_local_shared_r600(b, 32, addr_outer);
 
    std::vector<nir_def *> tf_out;
 
@@ -548,45 +530,39 @@ r600_append_tcs_TF_emission(nir_shader *shader, enum mesa_prim prim_type)
 
    tf_out.push_back(nir_vec2(b,
                              out_addr0,
-                             nir_channel(b, &tf_outer->def, chanx)));
+                             nir_channel(b, tf_outer, chanx)));
 
    tf_out.push_back(nir_vec2(b, nir_iadd_imm(b, out_addr0, 4),
-                             nir_channel(b, &tf_outer->def, chany)));
+                             nir_channel(b, tf_outer, chany)));
 
 
    if (outer_comps > 2) {
       tf_out.push_back(nir_vec2(b,
                                 nir_iadd_imm(b, out_addr0, 8),
-                                nir_channel(b, &tf_outer->def, 2)));
+                                nir_channel(b, tf_outer, 2)));
    }
 
    if (outer_comps > 3) {
       tf_out.push_back(nir_vec2(b,
                                 nir_iadd_imm(b, out_addr0, 12),
-                                nir_channel(b, &tf_outer->def, 3)));
+                                nir_channel(b, tf_outer, 3)));
       inner_base = 16;
 
    }
 
    if (inner_comps) {
       nir_def *addr1 = nir_iadd(b, addr0, load_offset_group(b, 4 + inner_comps));
-      auto tf_inner =
-         nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_local_shared_r600);
-      tf_inner->num_components = inner_comps;
-      tf_inner->src[0] = nir_src_for_ssa(addr1);
-      nir_def_init(
-         &tf_inner->instr, &tf_inner->def, tf_inner->num_components, 32);
-      nir_builder_instr_insert(b, &tf_inner->instr);
+      nir_def *tf_inner = nir_load_local_shared_r600(b, 32, addr1);
 
       tf_out.push_back(nir_vec2(b,
                                 nir_iadd_imm(b, out_addr0, inner_base),
-                                nir_channel(b, &tf_inner->def, 0)));
+                                nir_channel(b, tf_inner, 0)));
 
 
       if (inner_comps > 1) {
          tf_out.push_back(nir_vec2(b,
                                    nir_iadd_imm(b, out_addr0, inner_base + 4),
-                                   nir_channel(b, &tf_inner->def, 1)));
+                                   nir_channel(b, tf_inner, 1)));
 
       }
    }