armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server
authorYork Sun <yorksun@freescale.com>
Mon, 7 Dec 2015 19:08:58 +0000 (11:08 -0800)
committerYork Sun <yorksun@freescale.com>
Tue, 15 Dec 2015 00:57:33 +0000 (08:57 +0800)
MC and debug server are not board-specific. Move reserving memory to SoC
file, using the new board_reserve_ram_top function. Reduce debug server
memory by 2MB to make room for secure memory.

In the system with MC and debug server, the top of u-boot memory
is not the end of memory. PRAM is not used for this reservation.

Signed-off-by: York Sun <yorksun@freescale.com>
README
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
board/freescale/ls2080a/ls2080a.c
board/freescale/ls2080aqds/ls2080aqds.c
board/freescale/ls2080ardb/ls2080ardb.c
include/configs/ls2080a_common.h

diff --git a/README b/README
index 4aa2aae..43f307f 100644 (file)
--- a/README
+++ b/README
@@ -5056,8 +5056,8 @@ This firmware often needs to be loaded during U-Boot booting.
 - CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
        Define minimum DDR size required for debug server image
 
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
-       Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RSV_MEM_ALIGN
+       Define alignment of reserved memory MC requires
 
 Reproducible builds
 -------------------
index 87ccaf1..6ea28ed 100644 (file)
@@ -636,3 +636,24 @@ void reset_cpu(ulong addr)
        val |= 0x02;
        scfg_out32(rstcr, val);
 }
+
+phys_size_t board_reserve_ram_top(phys_size_t ram_size)
+{
+       phys_size_t ram_top = ram_size;
+
+#ifdef CONFIG_SYS_MEM_TOP_HIDE
+#error CONFIG_SYS_MEM_TOP_HIDE not to be used together with this function
+#endif
+/* Carve the Debug Server private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_DEBUG_SERVER
+       ram_top -= debug_server_get_dram_block_size();
+#endif
+
+/* Carve the MC private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_MC_ENET
+       ram_top -= mc_get_dram_block_size();
+       ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
+#endif
+
+       return ram_top;
+}
index 827fbf0..7bce8b0 100644 (file)
@@ -68,23 +68,6 @@ int arch_misc_init(void)
 }
 #endif
 
-unsigned long get_dram_size_to_hide(void)
-{
-       unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
-       dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
-       dram_to_hide += mc_get_dram_block_size();
-#endif
-
-       return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
 int board_eth_init(bd_t *bis)
 {
        int error = 0;
index 1f99072..aa256a2 100644 (file)
@@ -253,23 +253,6 @@ int arch_misc_init(void)
 }
 #endif
 
-unsigned long get_dram_size_to_hide(void)
-{
-       unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
-       dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
-       dram_to_hide += mc_get_dram_block_size();
-#endif
-
-       return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
index 2ae9d6c..c63b639 100644 (file)
@@ -219,23 +219,6 @@ int arch_misc_init(void)
 }
 #endif
 
-unsigned long get_dram_size_to_hide(void)
-{
-       unsigned long dram_to_hide = 0;
-
-/* Carve the Debug Server private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_DEBUG_SERVER
-       dram_to_hide += debug_server_get_dram_block_size();
-#endif
-
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
-       dram_to_hide += mc_get_dram_block_size();
-#endif
-
-       return roundup(dram_to_hide, CONFIG_SYS_MEM_TOP_HIDE_MIN);
-}
-
 #ifdef CONFIG_FSL_MC_ENET
 void fdt_fixup_board_enet(void *fdt)
 {
index 969aed6..4ae7d11 100644 (file)
@@ -195,10 +195,9 @@ unsigned long long get_qixis_addr(void);
  * 512MB aligned, so the min size to hide is 512MB.
  */
 #if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
-#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE    (256UL * 1024 * 1024)
+#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE    (254UL * 1024 * 1024)
 #define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (256UL * 1024 * 1024)
-#define CONFIG_SYS_MEM_TOP_HIDE_MIN                    (512UL * 1024 * 1024)
-#define CONFIG_SYS_MEM_TOP_HIDE                get_dram_size_to_hide()
+#define CONFIG_SYS_MC_RSV_MEM_ALIGN                    (512UL * 1024 * 1024)
 #endif
 
 /* PCIe */
@@ -290,10 +289,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS             64      /* max command args */
 
-#ifndef __ASSEMBLY__
-unsigned long get_dram_size_to_hide(void);
-#endif
-
 #define CONFIG_PANIC_HANG      /* do not reset board on panic */
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80100000