board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL

Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>

diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 04422ce..93df7ba 100644 (file)
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -175,7 +175,7 @@ static void board_sdhci0_hw_init(void)
 
        at91_periph_clk_enable(ATMEL_ID_SDMMC0);
        at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0,
-                                        GCK_CSS_PLLA_CLK, 1);
+                                        GCK_CSS_UPLL_CLK, 1);
 }
 
 static void board_sdhci1_hw_init(void)
@@ -191,7 +191,7 @@ static void board_sdhci1_hw_init(void)
 
        at91_periph_clk_enable(ATMEL_ID_SDMMC1);
        at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1,
-                                        GCK_CSS_PLLA_CLK, 1);
+                                        GCK_CSS_UPLL_CLK, 1);
 }
 
 int board_mmc_init(bd_t *bis)